From 9b01db3d112622a5a7ebbcb0b353d89b91807fc2 Mon Sep 17 00:00:00 2001 From: David Nadlinger Date: Sat, 6 Nov 2021 22:34:32 +0000 Subject: [PATCH] compiler: Emit sret call site argument attributes LLVM 6 seemed not to mind the mismatch, but more recent versions produce miscompilations without this. Needs llvmlite support (GitHub: numba/llvmlite#702). --- artiq/compiler/transforms/llvm_ir_generator.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/artiq/compiler/transforms/llvm_ir_generator.py b/artiq/compiler/transforms/llvm_ir_generator.py index 084e5ae09..9e3482c18 100644 --- a/artiq/compiler/transforms/llvm_ir_generator.py +++ b/artiq/compiler/transforms/llvm_ir_generator.py @@ -1355,7 +1355,7 @@ class LLVMIRGenerator: llstackptr = self.llbuilder.call(self.llbuiltin("llvm.stacksave"), []) llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee) - llcall = self.llbuilder.call(llfun, [llresultslot] + llargs) + self.llbuilder.call(llfun, [llresultslot] + llargs, arg_attrs={0: "sret"}) llresult = self.llbuilder.load(llresultslot) self.llbuilder.call(self.llbuiltin("llvm.stackrestore"), [llstackptr]) @@ -1388,7 +1388,8 @@ class LLVMIRGenerator: llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee) llcall = self.llbuilder.invoke(llfun, [llresultslot] + llargs, - llnormalblock, llunwindblock, name=insn.name) + llnormalblock, llunwindblock, name=insn.name, + arg_attrs={0: "sret"}) self.llbuilder.position_at_start(llnormalblock) llresult = self.llbuilder.load(llresultslot)