From 98cd9a539cec31413562eae2c8355f4070cfd66a Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Mon, 26 Aug 2019 10:45:00 +0800 Subject: [PATCH] compiler: support Cortex A9 target --- artiq/compiler/targets.py | 7 +++++++ artiq/coredevice/core.py | 12 +++++++++--- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/artiq/compiler/targets.py b/artiq/compiler/targets.py index a10058211..1519a8df9 100644 --- a/artiq/compiler/targets.py +++ b/artiq/compiler/targets.py @@ -254,3 +254,10 @@ class OR1KTarget(Target): features = ["mul", "div", "ffl1", "cmov", "addc"] print_function = "core_log" little_endian = False + +class CortexA9Target(Target): + triple = "armv7-unknown-linux-gnueabihf" + data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" + features = ["dsp", "fp16", "neon", "vfp3"] + print_function = "core_log" + little_endian = True diff --git a/artiq/coredevice/core.py b/artiq/coredevice/core.py index e4f5ec6ce..d150df596 100644 --- a/artiq/coredevice/core.py +++ b/artiq/coredevice/core.py @@ -11,7 +11,7 @@ from artiq.language.units import * from artiq.compiler.module import Module from artiq.compiler.embedding import Stitcher -from artiq.compiler.targets import OR1KTarget +from artiq.compiler.targets import OR1KTarget, CortexA9Target from artiq.coredevice.comm_kernel import CommKernel, CommKernelDummy # Import for side effects (creating the exception classes). @@ -71,9 +71,15 @@ class Core: "core", "ref_period", "coarse_ref_period", "ref_multiplier", } - def __init__(self, dmgr, host, ref_period, ref_multiplier=8): + def __init__(self, dmgr, host, ref_period, ref_multiplier=8, target="or1k"): self.ref_period = ref_period self.ref_multiplier = ref_multiplier + if target == "or1k": + self.target_cls = OR1KTarget + elif target == "cortexa9": + self.target_cls = CortexA9Target + else: + raise ValueError("Unsupported target") self.coarse_ref_period = ref_period*ref_multiplier if host is None: self.comm = CommKernelDummy() @@ -101,7 +107,7 @@ class Core: module = Module(stitcher, ref_period=self.ref_period, attribute_writeback=attribute_writeback) - target = OR1KTarget() + target = self.target_cls() library = target.compile_and_link([module]) stripped_library = target.strip(library)