From 98854473ddd6296f00ecc013c074f4423d006eab Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 2 Nov 2019 12:12:32 +0800 Subject: [PATCH] sayma_amc: use all transceivers on master (#1230) --- artiq/gateware/targets/sayma_amc.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/artiq/gateware/targets/sayma_amc.py b/artiq/gateware/targets/sayma_amc.py index 3694068fb..95d2347b0 100755 --- a/artiq/gateware/targets/sayma_amc.py +++ b/artiq/gateware/targets/sayma_amc.py @@ -369,8 +369,7 @@ class Master(MiniSoC, AMPSoC): self.submodules.drtio_transceiver = gth_ultrascale.GTH( clock_pads=platform.request("cdr_clk_clean", 0), data_pads=[platform.request("sfp", 0)] + - # 6 and not 8 to work around Vivado bug (Xilinx CR 1020646) - [platform.request("rtm_gth", i) for i in range(6)], + [platform.request("rtm_gth", i) for i in range(8)], sys_clk_freq=self.clk_freq, rtio_clk_freq=rtio_clk_freq) self.csr_devices.append("drtio_transceiver")