mirror of https://github.com/m-labs/artiq.git
runtime: remove unnecessary dcache flush.
Data cache is write-through, so sending data to DMA doesn't need a flush.
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@ -410,7 +410,6 @@ fn process_kern_message(io: &Io, mut stream: Option<&mut TcpStream>,
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}
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&kern::DmaRecordStop(name) => {
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session.congress.dma_manager.record_stop(name);
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board::cache::flush_cpu_dcache();
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board::cache::flush_l2_cache();
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kern_acknowledge()
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}
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