mirror of https://github.com/m-labs/artiq.git
firmware: fix warnings in ad9154 driver.
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8a70c18d1e
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@ -609,27 +609,25 @@ fn dac_cfg_retry(dacno: u8) -> Result<(), &'static str> {
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}
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fn dac_sysref_cfg(dacno: u8) {
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let mut sync_error: u16 = 0;
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let mut sync_error_last: u16 = 0;
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let mut phase_min_found: bool = false;
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let mut phase_min: u16 = 0;
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let mut phase_max_found: bool = false;
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let mut phase_max: u16 = 0;
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let mut phase_opt: u16 = 0;
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let mut sync_error_last = 0u16;
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let mut phase_min_found = false;
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let mut phase_min = 0u16;
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let mut _phase_max_found = false;
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let mut phase_max = 0u16;
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info!("AD9154-{} SYSREF scan/conf...", dacno);
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for phase in 0..512 {
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hmc7043::cfg_dac_sysref(dacno, phase);
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clock::spin_us(10000);
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spi_setup(dacno);
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sync_error = ((read(ad9154_reg::SYNC_CURRERR_L) as u16) |
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((read(ad9154_reg::SYNC_CURRERR_H) as u16) << 8))
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& 0x1ff;
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let sync_error = ((read(ad9154_reg::SYNC_CURRERR_L) as u16) |
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((read(ad9154_reg::SYNC_CURRERR_H) as u16) << 8))
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& 0x1ff;
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info!(" phase: {}, sync error: {}", phase, sync_error);
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if sync_error != 0 {
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if phase_min_found {
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if sync_error != sync_error_last {
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phase_max_found = true;
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_phase_max_found = true;
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phase_max = phase - 1;
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break;
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}
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@ -641,7 +639,7 @@ fn dac_sysref_cfg(dacno: u8) {
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sync_error_last = sync_error;
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}
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phase_opt = phase_min + (phase_max-phase_min)/2;
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let phase_opt = phase_min + (phase_max-phase_min)/2;
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info!(" phase min: {}, phase max: {}, phase opt: {}", phase_min, phase_max, phase_opt);
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hmc7043::cfg_dac_sysref(dacno, phase_opt);
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}
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