drtio: remove old debugging features

artiq/coredevice/drtio_dbg.py

@@ -1,17 +0,0 @@
-"""
-DRTIO debugging functions.
-
-Those syscalls are intended for ARTIQ developers only.
-"""
-
-from artiq.language.core import syscall
-from artiq.language.types import TTuple, TInt32, TInt64, TNone
-
-
-@syscall(flags={"nounwind", "nowrite"})
-def drtio_get_packet_counts(linkno: TInt32) -> TTuple([TInt32, TInt32]):
-    raise NotImplementedError("syscall not simulated")
-
-@syscall(flags={"nounwind", "nowrite"})
-def drtio_get_fifo_space_req_count(linkno: TInt32) -> TInt32:
-    raise NotImplementedError("syscall not simulated")

artiq/firmware/ksupport/api.rs

@@ -109,8 +109,6 @@ static mut API: &'static [(&'static str, *const ())] = &[
     api!(dma_playback = ::dma_playback),
 
     api!(drtio_get_link_status = ::rtio::drtio::get_link_status),
-    api!(drtio_get_packet_counts = ::rtio::drtio::get_packet_counts),
-    api!(drtio_get_buffer_space_req_count = ::rtio::drtio::get_buffer_space_req_count),
 
     api!(i2c_start = ::nrt_bus::i2c::start),
     api!(i2c_restart = ::nrt_bus::i2c::restart),

artiq/firmware/ksupport/rtio.rs

@@ -219,19 +219,4 @@ pub mod drtio {
         send(&DrtioLinkStatusRequest { linkno: linkno as u8 });
         recv!(&DrtioLinkStatusReply { up } => up)
     }
-
-    #[repr(C)]
-    pub struct PacketCounts(i32, i32);
-
-    pub extern fn get_packet_counts(linkno: i32) -> PacketCounts {
-        send(&DrtioPacketCountRequest { linkno: linkno as u8 });
-        recv!(&DrtioPacketCountReply { tx_cnt, rx_cnt }
-              => PacketCounts(tx_cnt as i32, rx_cnt as i32))
-    }
-
-    pub extern fn get_buffer_space_req_count(linkno: i32) -> i32 {
-        send(&DrtioBufferSpaceReqCountRequest { linkno: linkno as u8 });
-        recv!(&DrtioBufferSpaceReqCountReply { cnt }
-              => cnt as i32)
-    }
 }

artiq/firmware/libproto_artiq/kernel_proto.rs

@@ -49,11 +49,6 @@ pub enum Message<'a> {
     DrtioLinkStatusRequest { linkno: u8 },
     DrtioLinkStatusReply { up: bool },
 
-    DrtioPacketCountRequest { linkno: u8 },
-    DrtioPacketCountReply { tx_cnt: u32, rx_cnt: u32 },
-    DrtioBufferSpaceReqCountRequest { linkno: u8 },
-    DrtioBufferSpaceReqCountReply { cnt: u32 },
-
     RunFinished,
     RunException {
         exception: Exception<'a>,

artiq/firmware/runtime/kern_hwreq.rs

@@ -302,15 +302,6 @@ pub fn process_kern_hwreq(io: &Io, request: &kern::Message) -> Result<bool, Erro
             kern_send(io, &kern::DrtioLinkStatusReply { up: up })
         }
 
-        &kern::DrtioPacketCountRequest { linkno } => {
-            let (tx_cnt, rx_cnt) = rtio_mgt::drtio_dbg::get_packet_counts(linkno);
-            kern_send(io, &kern::DrtioPacketCountReply { tx_cnt: tx_cnt, rx_cnt: rx_cnt })
-        }
-        &kern::DrtioBufferSpaceReqCountRequest { linkno } => {
-            let cnt = rtio_mgt::drtio_dbg::get_buffer_space_req_count(linkno);
-            kern_send(io, &kern::DrtioBufferSpaceReqCountReply { cnt: cnt })
-        }
-
         &kern::I2cStartRequest { busno } => {
             let succeeded = i2c::start(busno).is_ok();
             kern_send(io, &kern::I2cBasicReply { succeeded: succeeded })

artiq/firmware/runtime/rtio_mgt.rs

@@ -357,31 +357,3 @@ pub fn init_core(phy: bool) {
     }
     drtio::init()
 }
-
-#[cfg(has_drtio)]
-pub mod drtio_dbg {
-    use board_misoc::csr;
-
-    pub fn get_packet_counts(linkno: u8) -> (u32, u32) {
-        let linkno = linkno as usize;
-        unsafe {
-            (csr::DRTIO[linkno].update_packet_cnt_write)(1);
-            ((csr::DRTIO[linkno].packet_cnt_tx_read)(),
-             (csr::DRTIO[linkno].packet_cnt_rx_read)())
-        }
-    }
-
-    pub fn get_buffer_space_req_count(linkno: u8) -> u32 {
-        let linkno = linkno as usize;
-        unsafe {
-            (csr::DRTIO[linkno].o_dbg_buffer_space_req_cnt_read)()
-        }
-    }
-}
-
-#[cfg(not(has_drtio))]
-pub mod drtio_dbg {
-    pub fn get_packet_counts(_linkno: u8) -> (u32, u32) { (0, 0) }
-
-    pub fn get_buffer_space_req_count(_linkno: u8) -> u32 { 0 }
-}

artiq/gateware/drtio/core.py

@@ -161,13 +161,11 @@ class DRTIOMaster(Module):
         self.submodules.rt_packet = rt_packet_master.RTPacketMaster(self.link_layer)
         self.submodules.rt_controller = rt_controller_master.RTController(
             tsc, self.rt_packet)
-        self.submodules.rt_manager = rt_controller_master.RTManager(self.rt_packet)
 
     def get_csrs(self):
         return (self.link_layer.get_csrs() +
                 self.link_stats.get_csrs() +
-                self.rt_controller.get_csrs() +
+                self.rt_controller.get_csrs())
-                self.rt_manager.get_csrs())
 
     @property
     def cri(self):

artiq/gateware/drtio/rt_controller_master.py

@@ -220,26 +220,3 @@ class RTController(Module):
 
     def get_csrs(self):
         return self.csrs.get_csrs()
-
-
-class RTManager(Module, AutoCSR):
-    def __init__(self, rt_packet):
-        self.request_echo = CSR()
-
-        self.update_packet_cnt = CSR()
-        self.packet_cnt_tx = CSRStatus(32)
-        self.packet_cnt_rx = CSRStatus(32)
-
-        # # #
-
-        self.comb += self.request_echo.w.eq(rt_packet.echo_stb)
-        self.sync += [
-            If(rt_packet.echo_ack, rt_packet.echo_stb.eq(0)),
-            If(self.request_echo.re, rt_packet.echo_stb.eq(1))
-        ]
-
-        self.sync += \
-            If(self.update_packet_cnt.re,
-                self.packet_cnt_tx.status.eq(rt_packet.packet_cnt_tx),
-                self.packet_cnt_rx.status.eq(rt_packet.packet_cnt_rx)
-            )

artiq/gateware/test/drtio/test_full_stack.py

@@ -291,26 +291,25 @@ class TestFullStack(unittest.TestCase):
 
     def test_echo(self):
         dut = DUT(2)
-        csrs = dut.master.rt_controller.csrs
+        packet = dut.master.rt_packet
-        mgr = dut.master.rt_manager
 
         def test():
             while not (yield from dut.master.link_layer.rx_up.read()):
                 yield
 
-            yield from mgr.update_packet_cnt.write(1)
+            self.assertEqual((yield dut.master.rt_packet.packet_cnt_tx), 0)
-            yield
+            self.assertEqual((yield dut.master.rt_packet.packet_cnt_rx), 0)
-            self.assertEqual((yield from mgr.packet_cnt_tx.read()), 0)
-            self.assertEqual((yield from mgr.packet_cnt_rx.read()), 0)
 
-            yield from mgr.request_echo.write(1)
+            yield dut.master.rt_packet.echo_stb.eq(1)
+            yield
+            while not (yield dut.master.rt_packet.echo_ack):
+                yield
+            yield dut.master.rt_packet.echo_stb.eq(0)
 
             for i in range(15):
                 yield
 
-            yield from mgr.update_packet_cnt.write(1)
+            self.assertEqual((yield dut.master.rt_packet.packet_cnt_tx), 1)
-            yield
+            self.assertEqual((yield dut.master.rt_packet.packet_cnt_rx), 1)
-            self.assertEqual((yield from mgr.packet_cnt_tx.read()), 1)
-            self.assertEqual((yield from mgr.packet_cnt_rx.read()), 1)
 
         run_simulation(dut, test(), self.clocks)