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artiq
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runtime: use booleans in syscalls

This commit is contained in:
Sebastien Bourdeauducq 2014-11-20 12:49:09 -08:00
parent dfd779c7c5
commit 914bdd95d5
3 changed files with 7 additions and 7 deletions
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4
artiq/coredevice/gpio.py
View File

@ -6,8 +6,8 @@ class GPIOOut(AutoContext):
@kernel @kernel
def on(self): def on(self):
syscall("gpio_set", self.channel, 1) syscall("gpio_set", self.channel, True)
@kernel @kernel
def off(self): def off(self):
syscall("gpio_set", self.channel, 0) syscall("gpio_set", self.channel, False)

6
artiq/coredevice/rtio.py
View File

@ -20,7 +20,7 @@ class LLRTIOOut(AutoContext):
@kernel @kernel
def _set_oe(self): def _set_oe(self):
syscall("rtio_oe", self.channel, 1) syscall("rtio_oe", self.channel, True)
@kernel @kernel
def set_value(self, t, value): def set_value(self, t, value):
@ -96,7 +96,7 @@ class RTIOOut(_RTIOBase):
""" """
def build(self): def build(self):
_RTIOBase.build(self) _RTIOBase.build(self)
self._set_oe(1) self._set_oe(True)
@kernel @kernel
def sync(self): def sync(self):
@ -146,7 +146,7 @@ class RTIOIn(_RTIOBase):
""" """
def build(self): def build(self):
_RTIOBase.build(self) _RTIOBase.build(self)
self._set_oe(0) self._set_oe(False)
@kernel @kernel
def gate_rising(self, duration): def gate_rising(self, duration):

4
artiq/coredevice/runtime.py
View File

@ -12,8 +12,8 @@ lt.initialize_all()
_syscalls = { _syscalls = {
"rpc": "i+:i", "rpc": "i+:i",
"gpio_set": "ii:n", "gpio_set": "ib:n",
"rtio_oe": "ii:n", "rtio_oe": "ib:n",
"rtio_set": "Iii:n", "rtio_set": "Iii:n",
"rtio_replace": "Iii:n", "rtio_replace": "Iii:n",
"rtio_sync": "i:n", "rtio_sync": "i:n",