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https://github.com/m-labs/artiq.git
synced 2024-12-28 20:53:35 +08:00
runtime: use booleans in syscalls
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parent
dfd779c7c5
commit
914bdd95d5
@ -6,8 +6,8 @@ class GPIOOut(AutoContext):
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@kernel
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def on(self):
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syscall("gpio_set", self.channel, 1)
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syscall("gpio_set", self.channel, True)
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@kernel
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def off(self):
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syscall("gpio_set", self.channel, 0)
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syscall("gpio_set", self.channel, False)
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@ -20,7 +20,7 @@ class LLRTIOOut(AutoContext):
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@kernel
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def _set_oe(self):
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syscall("rtio_oe", self.channel, 1)
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syscall("rtio_oe", self.channel, True)
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@kernel
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def set_value(self, t, value):
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@ -96,7 +96,7 @@ class RTIOOut(_RTIOBase):
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"""
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def build(self):
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_RTIOBase.build(self)
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self._set_oe(1)
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self._set_oe(True)
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@kernel
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def sync(self):
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@ -146,7 +146,7 @@ class RTIOIn(_RTIOBase):
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"""
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def build(self):
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_RTIOBase.build(self)
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self._set_oe(0)
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self._set_oe(False)
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@kernel
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def gate_rising(self, duration):
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@ -12,8 +12,8 @@ lt.initialize_all()
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_syscalls = {
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"rpc": "i+:i",
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"gpio_set": "ii:n",
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"rtio_oe": "ii:n",
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"gpio_set": "ib:n",
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"rtio_oe": "ib:n",
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"rtio_set": "Iii:n",
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"rtio_replace": "Iii:n",
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"rtio_sync": "i:n",
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