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https://github.com/m-labs/artiq.git
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artiq_run: allow running LLVM IR/bitcode files, even with trivial RPCs.
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parent
da31d29897
commit
914bc9f360
@ -113,15 +113,18 @@ class Target:
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_dump(os.getenv("ARTIQ_DUMP_LLVM"), "LLVM IR (optimized)", ".ll",
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lambda: str(llparsedmod))
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return llparsedmod
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def assemble(self, llmodule):
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lltarget = llvm.Target.from_triple(self.triple)
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llmachine = lltarget.create_target_machine(
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features=",".join(["+{}".format(f) for f in self.features]),
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reloc="pic", codemodel="default")
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_dump(os.getenv("ARTIQ_DUMP_ASM"), "Assembly", ".s",
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lambda: llmachine.emit_assembly(llparsedmod))
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lambda: llmachine.emit_assembly(llmodule))
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return llmachine.emit_object(llparsedmod)
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return llmachine.emit_object(llmodule)
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def link(self, objects, init_fn):
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"""Link the relocatable objects into a shared library for this target."""
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@ -139,7 +142,7 @@ class Target:
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return library
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def compile_and_link(self, modules):
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return self.link([self.compile(module) for module in modules],
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return self.link([self.assemble(self.compile(module)) for module in modules],
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init_fn=modules[0].entry_point())
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def strip(self, library):
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@ -6,9 +6,12 @@ import argparse
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import sys
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from operator import itemgetter
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import logging
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from collections import defaultdict
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import h5py
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from llvmlite_artiq import binding as llvm
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from artiq.language.environment import EnvExperiment
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from artiq.master.databases import DeviceDB, DatasetDB
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from artiq.master.worker_db import DeviceManager, DatasetManager
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@ -19,21 +22,58 @@ from artiq.tools import *
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logger = logging.getLogger(__name__)
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class StubObject:
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def __setattr__(self, name, value):
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pass
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class ELFRunner(EnvExperiment):
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class StubObjectMap:
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def __init__(self):
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stub_object = StubObject()
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self.forward_map = defaultdict(lambda: stub_object)
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self.forward_map[1] = lambda _: None # return RPC
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self.next_id = -1
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def retrieve(self, object_id):
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return self.forward_map[object_id]
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def store(self, value):
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self.forward_map[self.next_id] = value
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self.next_id -= 1
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class FileRunner(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_argument("file")
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self.target = OR1KTarget()
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def run(self):
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with open(self.file, "rb") as f:
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kernel_library = f.read()
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kernel_library = self.compile()
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target = OR1KTarget()
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self.core.comm.load(kernel_library)
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self.core.comm.run()
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self.core.comm.serve(ObjectMap(),
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lambda addresses: target.symbolize(kernel_library, addresses))
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self.core.comm.serve(StubObjectMap(),
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lambda addresses: self.target.symbolize(kernel_library, addresses))
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class ELFRunner(FileRunner):
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def compile(self):
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with open(self.file, "rb") as f:
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return f.read()
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class LLVMIRRunner(FileRunner):
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def compile(self):
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with open(self.file, "r") as f:
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llmodule = llvm.parse_assembly(f.read())
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llmodule.verify()
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return self.target.link([self.target.assemble(llmodule)],
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init_fn='__modinit__')
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class LLVMBitcodeRunner(FileRunner):
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def compile(self):
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with open(self.file, "rb") as f:
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llmodule = llvm.parse_bitcode(f.read())
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llmodule.verify()
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return self.target.link([self.target.assemble(llmodule)],
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init_fn='__modinit__')
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class DummyScheduler:
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@ -91,13 +131,21 @@ def get_argparser(with_file=True):
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def _build_experiment(device_mgr, dataset_mgr, args):
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if hasattr(args, "file"):
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if args.file.endswith(".elf"):
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is_elf = args.file.endswith(".elf")
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is_ll = args.file.endswith(".ll")
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is_bc = args.file.endswith(".bc")
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if is_elf or is_ll or is_bc:
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if args.arguments:
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raise ValueError("arguments not supported for ELF kernels")
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raise ValueError("arguments not supported for precompiled kernels")
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if args.experiment:
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raise ValueError("experiment-by-name not supported "
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"for ELF kernels")
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"for precompiled kernels")
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if is_elf:
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return ELFRunner(device_mgr, dataset_mgr, file=args.file)
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elif is_ll:
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return LLVMIRRunner(device_mgr, dataset_mgr, file=args.file)
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elif is_bc:
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return LLVMBitcodeRunner(device_mgr, dataset_mgr, file=args.file)
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else:
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module = file_import(args.file, prefix="artiq_run_")
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file = args.file
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