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targets/kc705: redefine user SMAs as 3.3V IO. Closes #502

This commit is contained in:
Sebastien Bourdeauducq 2016-07-07 14:53:01 +08:00
parent d90fd7dc00
commit 8cb29fcb3b
1 changed files with 15 additions and 4 deletions
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19
artiq/gateware/targets/kc705.py
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@ -33,7 +33,7 @@ class _RTIOCRG(Module, AutoCSR):
# 10 MHz when using 125MHz input # 10 MHz when using 125MHz input
self.clock_domains.cd_ext_clkout = ClockDomain(reset_less=True) self.clock_domains.cd_ext_clkout = ClockDomain(reset_less=True)
ext_clkout = platform.request("user_sma_gpio_p") ext_clkout = platform.request("user_sma_gpio_p_33")
self.sync.ext_clkout += ext_clkout.eq(~ext_clkout) self.sync.ext_clkout += ext_clkout.eq(~ext_clkout)
@ -79,6 +79,16 @@ class _RTIOCRG(Module, AutoCSR):
] ]
# The default user SMA voltage on KC705 is 2.5V, and the Migen platform
# follows this default. But since the SMAs are on the same bank as the DDS,
# which is set to 3.3V by reprogramming the KC705 power ICs, we need to
# redefine them here.
_sma33_io = [
("user_sma_gpio_p_33", 0, Pins("Y23"), IOStandard("LVCMOS33")),
("user_sma_gpio_n_33", 0, Pins("Y24"), IOStandard("LVCMOS33")),
]
_ams101_dac = [ _ams101_dac = [
("ams101_dac", 0, ("ams101_dac", 0,
Subsignal("ldac", Pins("XADC:GPIO0")), Subsignal("ldac", Pins("XADC:GPIO0")),
@ -131,6 +141,7 @@ class _NIST_Ions(MiniSoC, AMPSoC):
self.platform.request("user_led", 0), self.platform.request("user_led", 0),
self.platform.request("user_led", 1))) self.platform.request("user_led", 1)))
self.platform.add_extension(_sma33_io)
self.platform.add_extension(_ams101_dac) self.platform.add_extension(_ams101_dac)
i2c = self.platform.request("i2c") i2c = self.platform.request("i2c")
@ -192,7 +203,7 @@ class NIST_QC1(_NIST_Ions):
self.submodules += phy self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy)) rtio_channels.append(rtio.Channel.from_phy(phy))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n")) phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512)) rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
phy = ttl_simple.Output(platform.request("user_led", 2)) phy = ttl_simple.Output(platform.request("user_led", 2))
@ -248,7 +259,7 @@ class NIST_CLOCK(_NIST_Ions):
self.submodules += phy self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512)) rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n")) phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512)) rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
@ -326,7 +337,7 @@ class NIST_QC2(_NIST_Ions):
clock_generators.append(rtio.Channel.from_phy(phy)) clock_generators.append(rtio.Channel.from_phy(phy))
# user SMA on KC705 board # user SMA on KC705 board
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n")) phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512)) rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))