From a06164e4ce1d393b172650a9af001462b1815147 Mon Sep 17 00:00:00 2001
From: Robert Jordens <jordens@gmail.com>
Date: Thu, 5 Feb 2015 21:55:00 -0700
Subject: [PATCH 1/4] travis.yml: build bitstream only if [soc] in commit
 message

---
 .travis.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.travis.yml b/.travis.yml
index 4c8bab708..1e6721c69 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -10,6 +10,7 @@ env:
     - ARTIQ_NO_HARDWARE=1
     - secure: "DUk/Ihg8KbbzEgPF0qrHqlxU8e8eET9i/BtzNvFddIGX4HP/P2qz0nk3cVkmjuWhqJXSbC22RdKME9qqPzw6fJwJ6dpJ3OR6dDmSd7rewavq+niwxu52PVa+yK8mL4yf1terM7QQ5tIRf+yUL9qGKrZ2xyvEuRit6d4cFep43Ws="
 before_install:
+  - echo "$TRAVIS_COMMIT_MSG" | grep -vq "\[soc\]"; export SOC=$?; true
   - ./.travis/get-toolchain.sh
   - ./.travis/get-xilinx.sh
   - ./.travis/get-anaconda.sh pip coverage numpy scipy sphinx h5py pyserial dateutil
@@ -28,7 +29,7 @@ script:
   - make -C doc/manual html
   - cd misoc; python make.py -X ../soc -t artiq build-headers build-bios; cd ..
   - make -C soc/runtime
-  - cd misoc; python make.py -X ../soc -t artiq build-bitstream; cd ..
+  - if [ $SOC -ne 0 ]; then cd misoc python make.py -X ../soc -t artiq build-bitstream; cd ..; fi
 after_success:
   coveralls
 notifications:

From 411f7169608b0496de205d5f2ae58c26a7d0c4ba Mon Sep 17 00:00:00 2001
From: Robert Jordens <jordens@gmail.com>
Date: Thu, 5 Feb 2015 22:17:01 -0700
Subject: [PATCH 2/4] travis.yml: reduce irc noise

---
 .travis.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.travis.yml b/.travis.yml
index 1e6721c69..583871ab7 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -37,6 +37,9 @@ notifications:
   irc:
     channels:
       - chat.freenode.net#m-labs
+    template:
+      - "%{repository}#%{build_number} (%{branch} - %{commit} : %{author}): %{message}"
+      - "Build details : %{build_url}"
   webhooks:
     urls:
       - https://webhooks.gitter.im/e/d26782523952bfa53814

From ef3804a471daea78bed8430040431f27488ddcec Mon Sep 17 00:00:00 2001
From: Robert Jordens <jordens@gmail.com>
Date: Thu, 5 Feb 2015 22:26:26 -0700
Subject: [PATCH 3/4] travis: refactor get-misoc.sh

---
 .travis.yml          | 6 +-----
 .travis/get-misoc.sh | 6 ++++++
 2 files changed, 7 insertions(+), 5 deletions(-)
 create mode 100755 .travis/get-misoc.sh

diff --git a/.travis.yml b/.travis.yml
index 583871ab7..2b06c1c8f 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -15,11 +15,7 @@ before_install:
   - ./.travis/get-xilinx.sh
   - ./.travis/get-anaconda.sh pip coverage numpy scipy sphinx h5py pyserial dateutil
   - source $HOME/miniconda/bin/activate py34
-  - sudo apt-get install --force-yes -y iverilog
-  - pip install --src . -e 'git+https://github.com/m-labs/migen.git@master#egg=migen'
-  - mkdir vpi
-  - iverilog-vpi --name=vpi/migensim migen/vpi/main.c migen/vpi/ipc.c
-  - git clone --recursive https://github.com/m-labs/misoc
+  - ./.travis/get-misoc.sh
   - pip install --src . -e 'git+https://github.com/nist-ionstorage/llvmlite.git@artiq#egg=llvmlite'
   - pip install coveralls
 install:
diff --git a/.travis/get-misoc.sh b/.travis/get-misoc.sh
new file mode 100755
index 000000000..08bb61362
--- /dev/null
+++ b/.travis/get-misoc.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+sudo apt-get install --force-yes -y iverilog
+pip install --src . -e 'git+https://github.com/m-labs/migen.git@master#egg=migen'
+mkdir vpi && iverilog-vpi --name=vpi/migensim migen/vpi/main.c migen/vpi/ipc.c
+git clone --recursive https://github.com/m-labs/misoc

From c97946a71c367160a375e20a16fbd0acba8701c3 Mon Sep 17 00:00:00 2001
From: Robert Jordens <jordens@gmail.com>
Date: Thu, 5 Feb 2015 22:27:05 -0700
Subject: [PATCH 4/4] travis.yml: don't build bitstream for pull requests

---
 .travis.yml | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/.travis.yml b/.travis.yml
index 2b06c1c8f..61690333c 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -8,11 +8,13 @@ env:
     - CC=gcc-4.7
     - CXX=g++-4.7
     - ARTIQ_NO_HARDWARE=1
+    - BUILD_SOC=0
     - secure: "DUk/Ihg8KbbzEgPF0qrHqlxU8e8eET9i/BtzNvFddIGX4HP/P2qz0nk3cVkmjuWhqJXSbC22RdKME9qqPzw6fJwJ6dpJ3OR6dDmSd7rewavq+niwxu52PVa+yK8mL4yf1terM7QQ5tIRf+yUL9qGKrZ2xyvEuRit6d4cFep43Ws="
 before_install:
-  - echo "$TRAVIS_COMMIT_MSG" | grep -vq "\[soc\]"; export SOC=$?; true
+  - if echo "$TRAVIS_COMMIT_MSG" | grep -q "\[soc\]"; then BUILD_SOC=1; fi
+  - if [ $TRAVIS_PULL_REQUEST != false ]; then BUILD_SOC=0; fi
   - ./.travis/get-toolchain.sh
-  - ./.travis/get-xilinx.sh
+  - if [ $BUILD_SOC -ne 0 ]; then ./.travis/get-xilinx.sh; fi
   - ./.travis/get-anaconda.sh pip coverage numpy scipy sphinx h5py pyserial dateutil
   - source $HOME/miniconda/bin/activate py34
   - ./.travis/get-misoc.sh
@@ -25,7 +27,7 @@ script:
   - make -C doc/manual html
   - cd misoc; python make.py -X ../soc -t artiq build-headers build-bios; cd ..
   - make -C soc/runtime
-  - if [ $SOC -ne 0 ]; then cd misoc python make.py -X ../soc -t artiq build-bitstream; cd ..; fi
+  - if [ $BUILD_SOC -ne 0 ]; then cd misoc; python make.py -X ../soc -t artiq build-bitstream; cd ..; fi
 after_success:
   coveralls
 notifications: