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compiler: pass data_layout string to llvm.create_target_data before determining endianness

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This commit is contained in:
Sebastien Bourdeauducq 2018-12-02 18:26:19 +08:00
parent 2e66788c6c
commit 8940009e1a
1 changed files with 2 additions and 2 deletions
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4
artiq/compiler/transforms/llvm_ir_generator.py
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@ -150,8 +150,8 @@ class LLVMIRGenerator:
ll.Constant(lli64, 1)
])
assert self.llmodule.data_layout[0] in "eE"
self.little_endian = self.llmodule.data_layout[0] == "e"
assert self.lldatalayout in "eE"
self.little_endian = self.self.lldatalayout[0] == "e"
def needs_sret(self, lltyp, may_be_large=True):
if isinstance(lltyp, ll.VoidType):