mirror of https://github.com/m-labs/artiq.git
kasli: add NUDT variant
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@ -456,6 +456,39 @@ class WIPM(_StandaloneBase):
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self.add_rtio(self.rtio_channels)
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class NUDT(_StandaloneBase):
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# Like Tester, but fewer peripherals and newer Sampler
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def __init__(self, hw_rev=None, **kwargs):
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if hw_rev is None:
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hw_rev = "v1.1"
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_StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs)
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self.config["SI5324_AS_SYNTHESIZER"] = None
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# self.config["SI5324_EXT_REF"] = None
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self.config["RTIO_FREQUENCY"] = "125.0"
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if hw_rev == "v1.0":
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# EEM clock fan-out from Si5324, not MMCX
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self.comb += self.platform.request("clk_sel").eq(1)
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self.rtio_channels = []
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eem.DIO.add_std(self, 5,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X)
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eem.Sampler.add_std(self, 2, 3, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 4, ttl_serdes_7series.Output_8X)
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for i in (1, 2):
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sfp_ctl = self.platform.request("sfp_ctl", i)
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phy = ttl_simple.Output(sfp_ctl.led)
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self.submodules += phy
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self.rtio_channels.append(rtio.Channel.from_phy(phy))
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self.config["HAS_RTIO_LOG"] = None
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self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
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self.rtio_channels.append(rtio.LogChannel())
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self.add_rtio(self.rtio_channels)
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class PTB(_StandaloneBase):
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"""PTB Kasli variant
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@ -997,7 +1030,7 @@ def main():
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soc_kasli_args(parser)
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parser.set_defaults(output_dir="artiq_kasli")
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variants = {cls.__name__.lower(): cls for cls in [
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Opticlock, SUServo, SYSU, MITLL, MITLL2, USTC, Tsinghua, WIPM, PTB, HUB, LUH,
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Opticlock, SUServo, SYSU, MITLL, MITLL2, USTC, Tsinghua, WIPM, NUDT, PTB, HUB, LUH,
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VLBAIMaster, VLBAISatellite, Tester, Master, Satellite]}
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parser.add_argument("-V", "--variant", default="opticlock",
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help="variant: {} (default: %(default)s)".format(
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