From 868a9a1f0c7d4340ca90c57a14a9719e14a57400 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Wed, 16 Sep 2020 14:06:38 +0000 Subject: [PATCH] phaser: new multidds --- artiq/gateware/rtio/phy/phaser.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/artiq/gateware/rtio/phy/phaser.py b/artiq/gateware/rtio/phy/phaser.py index 634d4f202..bb299ab0c 100644 --- a/artiq/gateware/rtio/phy/phaser.py +++ b/artiq/gateware/rtio/phy/phaser.py @@ -36,7 +36,7 @@ class Phaser(Module): # share a CosSinGen LUT between the two channels self.submodules.ch0 = DDSChannel() - self.submodules.ch1 = DDSChannel(share_lut=self.ch0.dds.mod.cs.lut) + self.submodules.ch1 = DDSChannel(share_lut=self.ch0.dds.cs.lut) n_channels = 2 n_samples = 8 n_bits = 14