mirror of https://github.com/m-labs/artiq.git
fix more multi-DDS-bus problems
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de37487a5c
commit
861c4a9ae5
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@ -82,7 +82,7 @@ void dds_init(long long int timestamp, int bus_channel, int channel)
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/* Compensation to keep phase continuity when switching from absolute or tracking
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/* Compensation to keep phase continuity when switching from absolute or tracking
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* to continuous phase mode. */
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* to continuous phase mode. */
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static unsigned int continuous_phase_comp[CONFIG_DDS_CHANNEL_COUNT];
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static unsigned int continuous_phase_comp[CONFIG_RTIO_DDS_COUNT][CONFIG_DDS_CHANNELS_PER_BUS];
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static void dds_set_one(long long int now, long long int ref_time,
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static void dds_set_one(long long int now, long long int ref_time,
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int bus_channel, int channel,
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int bus_channel, int channel,
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@ -90,10 +90,15 @@ static void dds_set_one(long long int now, long long int ref_time,
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{
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{
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unsigned int channel_enc;
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unsigned int channel_enc;
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if(channel >= CONFIG_DDS_CHANNEL_COUNT) {
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if((channel < 0) || (channel >= CONFIG_DDS_CHANNELS_PER_BUS)) {
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core_log("Attempted to set invalid DDS channel\n");
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core_log("Attempted to set invalid DDS channel\n");
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return;
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return;
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}
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}
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if((bus_channel < CONFIG_RTIO_FIRST_DDS_CHANNEL)
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|| (bus_channel >= (CONFIG_RTIO_FIRST_DDS_CHANNEL+CONFIG_RTIO_DDS_COUNT))) {
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core_log("Attempted to use invalid DDS bus\n");
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return;
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}
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#ifdef CONFIG_DDS_ONEHOT_SEL
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#ifdef CONFIG_DDS_ONEHOT_SEL
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channel_enc = 1 << channel;
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channel_enc = 1 << channel;
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#else
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#else
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@ -125,7 +130,7 @@ static void dds_set_one(long long int now, long long int ref_time,
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/* Disable autoclear phase accumulator and enables OSK. */
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/* Disable autoclear phase accumulator and enables OSK. */
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DDS_WRITE(DDS_CFR1L, 0x0108);
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DDS_WRITE(DDS_CFR1L, 0x0108);
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#endif
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#endif
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pow += continuous_phase_comp[channel];
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pow += continuous_phase_comp[bus_channel-CONFIG_RTIO_FIRST_DDS_CHANNEL][channel];
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} else {
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} else {
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long long int fud_time;
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long long int fud_time;
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@ -141,7 +146,7 @@ static void dds_set_one(long long int now, long long int ref_time,
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pow -= (ref_time - fud_time)*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
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pow -= (ref_time - fud_time)*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
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if(phase_mode == PHASE_MODE_TRACKING)
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if(phase_mode == PHASE_MODE_TRACKING)
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pow += ref_time*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
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pow += ref_time*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
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continuous_phase_comp[channel] = pow;
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continuous_phase_comp[bus_channel-CONFIG_RTIO_FIRST_DDS_CHANNEL][channel] = pow;
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}
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}
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#ifdef CONFIG_DDS_AD9858
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#ifdef CONFIG_DDS_AD9858
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@ -305,7 +305,7 @@ static void do_ddstest_one(unsigned int i)
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brg_ddswrite(bus_channel, DDS_FTWL, f & 0xffff);
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brg_ddswrite(bus_channel, DDS_FTWL, f & 0xffff);
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brg_ddswrite(bus_channel, DDS_FTWH, (f >> 16) & 0xffff);
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brg_ddswrite(bus_channel, DDS_FTWH, (f >> 16) & 0xffff);
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#endif
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#endif
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brg_ddsfud();
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brg_ddsfud(bus_channel);
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#ifdef CONFIG_DDS_AD9858
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#ifdef CONFIG_DDS_AD9858
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g = brg_ddsread(bus_channel, DDS_FTW0);
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g = brg_ddsread(bus_channel, DDS_FTW0);
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g |= brg_ddsread(bus_channel, DDS_FTW1) << 8;
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g |= brg_ddsread(bus_channel, DDS_FTW1) << 8;
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