mirror of https://github.com/m-labs/artiq.git
compiler: use more LLVM tools on ARM (#733)
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7e400a78f4
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@ -68,8 +68,6 @@ class Target:
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:var triple: (string)
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:var triple: (string)
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LLVM target triple, e.g. ``"or1k"``
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LLVM target triple, e.g. ``"or1k"``
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:var linker: (string)
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Linker to run.
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:var data_layout: (string)
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:var data_layout: (string)
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LLVM target data layout, e.g. ``"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"``
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LLVM target data layout, e.g. ``"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"``
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:var features: (list of string)
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:var features: (list of string)
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@ -86,11 +84,15 @@ class Target:
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triple = "unknown"
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triple = "unknown"
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data_layout = ""
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data_layout = ""
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features = []
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features = []
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linker = "lld"
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print_function = "printf"
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print_function = "printf"
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little_endian = False
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little_endian = False
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now_pinning = True
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now_pinning = True
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tool_ld = "ld.lld"
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tool_strip = "llvm-strip"
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tool_addr2line = "llvm-addr2line"
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tool_cxxfilt = "llvm-cxxfilt"
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def __init__(self):
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def __init__(self):
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self.llcontext = ll.Context()
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self.llcontext = ll.Context()
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@ -179,7 +181,7 @@ class Target:
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def link(self, objects):
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def link(self, objects):
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"""Link the relocatable objects into a shared library for this target."""
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"""Link the relocatable objects into a shared library for this target."""
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with RunTool([self.linker, "-shared", "--eh-frame-hdr"] +
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with RunTool([self.tool_ld, "-shared", "--eh-frame-hdr"] +
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["{{obj{}}}".format(index) for index in range(len(objects))] +
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["{{obj{}}}".format(index) for index in range(len(objects))] +
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["-o", "{output}"],
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["-o", "{output}"],
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output=None,
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output=None,
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@ -196,7 +198,7 @@ class Target:
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return self.link([self.assemble(self.compile(module)) for module in modules])
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return self.link([self.assemble(self.compile(module)) for module in modules])
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def strip(self, library):
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def strip(self, library):
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with RunTool([self.triple + "-strip", "--strip-debug", "{library}", "-o", "{output}"],
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with RunTool([self.tool_strip, "--strip-debug", "{library}", "-o", "{output}"],
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library=library, output=None) \
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library=library, output=None) \
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as results:
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as results:
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return results["output"].read()
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return results["output"].read()
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@ -210,7 +212,7 @@ class Target:
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# inside the call instruction (or its delay slot), since that's what
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# inside the call instruction (or its delay slot), since that's what
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# the backtrace entry should point at.
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# the backtrace entry should point at.
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offset_addresses = [hex(addr - 1) for addr in addresses]
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offset_addresses = [hex(addr - 1) for addr in addresses]
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with RunTool([self.triple + "-addr2line", "--addresses", "--functions", "--inlines",
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with RunTool([self.tool_addr2line, "--addresses", "--functions", "--inlines",
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"--demangle", "--exe={library}"] + offset_addresses,
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"--demangle", "--exe={library}"] + offset_addresses,
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library=library) \
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library=library) \
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as results:
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as results:
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@ -241,7 +243,7 @@ class Target:
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return backtrace
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return backtrace
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def demangle(self, names):
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def demangle(self, names):
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with RunTool([self.triple + "-c++filt"] + names) as results:
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with RunTool([self.tool_cxxfilt] + names) as results:
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return results["__stdout__"].read().rstrip().split("\n")
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return results["__stdout__"].read().rstrip().split("\n")
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class NativeTarget(Target):
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class NativeTarget(Target):
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@ -257,16 +259,19 @@ class OR1KTarget(Target):
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data_layout = "E-m:e-p:32:32-i8:8:8-i16:16:16-i64:32:32-" \
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data_layout = "E-m:e-p:32:32-i8:8:8-i16:16:16-i64:32:32-" \
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"f64:32:32-v64:32:32-v128:32:32-a0:0:32-n32"
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"f64:32:32-v64:32:32-v128:32:32-a0:0:32-n32"
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features = ["mul", "div", "ffl1", "cmov", "addc"]
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features = ["mul", "div", "ffl1", "cmov", "addc"]
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linker = "or1k-linux-ld"
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print_function = "core_log"
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print_function = "core_log"
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little_endian = False
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little_endian = False
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now_pinning = True
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now_pinning = True
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tool_ld = "or1k-linux-ld"
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tool_strip = "or1k-linux-strip"
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tool_addr2line = "or1k-linux-addr2line"
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tool_cxxfilt = "or1k-linux-c++filt"
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class CortexA9Target(Target):
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class CortexA9Target(Target):
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triple = "armv7-unknown-linux-gnueabihf"
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triple = "armv7-unknown-linux-gnueabihf"
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data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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features = ["dsp", "fp16", "neon", "vfp3"]
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features = ["dsp", "fp16", "neon", "vfp3"]
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linker = "ld.lld"
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print_function = "core_log"
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print_function = "core_log"
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little_endian = True
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little_endian = True
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now_pinning = False
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now_pinning = False
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