mirror of https://github.com/m-labs/artiq.git
compiler.testbench.embedding: allow compiling only.
This commit is contained in:
parent
7bcba52d6a
commit
844d37ff18
|
@ -6,6 +6,12 @@ from artiq.master.worker_db import DeviceManager
|
||||||
from artiq.coredevice.core import Core, CompileError
|
from artiq.coredevice.core import Core, CompileError
|
||||||
|
|
||||||
def main():
|
def main():
|
||||||
|
if len(sys.argv) > 1 and sys.argv[1] == "+compile":
|
||||||
|
del sys.argv[1]
|
||||||
|
compile_only = True
|
||||||
|
else:
|
||||||
|
compile_only = False
|
||||||
|
|
||||||
with open(sys.argv[1]) as f:
|
with open(sys.argv[1]) as f:
|
||||||
testcase_code = compile(f.read(), f.name, "exec")
|
testcase_code = compile(f.read(), f.name, "exec")
|
||||||
testcase_vars = {'__name__': 'testbench'}
|
testcase_vars = {'__name__': 'testbench'}
|
||||||
|
@ -15,9 +21,12 @@ def main():
|
||||||
|
|
||||||
try:
|
try:
|
||||||
core = Core(dmgr=DeviceManager(FlatFileDB(ddb_path)))
|
core = Core(dmgr=DeviceManager(FlatFileDB(ddb_path)))
|
||||||
core.run(testcase_vars["entrypoint"], (), {})
|
if compile_only:
|
||||||
print(core.comm.get_log())
|
core.compile(testcase_vars["entrypoint"], (), {})
|
||||||
core.comm.clear_log()
|
else:
|
||||||
|
core.run(testcase_vars["entrypoint"], (), {})
|
||||||
|
print(core.comm.get_log())
|
||||||
|
core.comm.clear_log()
|
||||||
except CompileError as error:
|
except CompileError as error:
|
||||||
print("\n".join(error.__cause__.diagnostic.render(only_line=True)))
|
print("\n".join(error.__cause__.diagnostic.render(only_line=True)))
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue