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pdq2: mem_read
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20652ce128
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@ -35,7 +35,7 @@ class PDQ2:
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self.chip_select = chip_select
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@kernel
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def setup_bus(self, write_div=4, read_div=15):
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def setup_bus(self, write_div=24, read_div=64):
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"""Configure the SPI bus and the SPI transaction parameters
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for this device. This method has to be called before any other method
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if the bus has been used to access a different device in the meantime.
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@ -64,7 +64,7 @@ class PDQ2:
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delay_mu(self.bus.ref_period_mu) # get to 20ns min cs high
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self.bus.read_async()
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self.bus.set_xfer(self.chip_select, 16, 0)
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return self.bus.input_async() & 0xff
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return int(self.bus.input_async() & 0xff) # FIXME: m-labs/artiq#713
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@kernel
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def write_config(self, reset=0, clk2x=0, enable=1,
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@ -94,7 +94,7 @@ class PDQ2:
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return self.read_reg(_PDQ2_ADR_FRAME, board)
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@kernel
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def write_mem(self, mem, adr, data, board=0xf):
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def write_mem(self, mem, adr, data, board=0xf): # FIXME: m-labs/artiq#714
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self.bus.set_xfer(self.chip_select, 24, 0)
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self.bus.write((_PDQ2_CMD(board, 1, mem, 1) << 24) |
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((adr & 0x00ff) << 16) | (adr & 0xff00))
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@ -108,4 +108,21 @@ class PDQ2:
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@kernel
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def read_mem(self, mem, adr, data, board=0xf):
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pass
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self.bus.set_xfer(self.chip_select, 24, 8)
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self.bus.write((_PDQ2_CMD(board, 1, mem, 0) << 24) |
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((adr & 0x00ff) << 16) | (adr & 0xff00))
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delay_mu(-self.bus.write_period_mu-3*self.bus.ref_period_mu)
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self.bus.set_xfer(self.chip_select, 0, 16)
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for i in range(len(data)//2):
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self.bus.write(0)
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delay_mu(-self.bus.write_period_mu-3*self.bus.ref_period_mu)
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self.bus.read_async()
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d = self.bus.input_async()
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data[2*i] = (d >> 8) & 0xff
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data[2*i + 1] = d & 0xff
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return int(self.bus.input_async() & 0xff) # FIXME: m-labs/artiq#713
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delay_mu(self.bus.write_period_mu + self.bus.ref_period_mu)
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# get to 20ns min cs high
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self.bus.set_xfer(self.chip_select, 16, 0)
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pass
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