examples/simple_simulation: fix

2022-04-12 15:59:20 +08:00 · 2022-04-12 15:59:20 +08:00 · 83676927b5
parent c171deec51
commit 83676927b5
1 changed files with 1 additions and 1 deletions
--- a/artiq/examples/no_hardware/repository/simple_simulation.py
+++ b/artiq/examples/no_hardware/repository/simple_simulation.py
@ -27,7 +27,7 @@ def main():
    dmgr["core"] = devices.Core(dmgr)
    for wo in "abcd":
        dmgr[wo] = devices.WaveOutput(dmgr, wo)
-    exp = SimpleSimulation(dmgr)
+    exp = SimpleSimulation((dmgr, None, None, {}))
    exp.run()

 if __name__ == "__main__":