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sayma_rtm_drtio: use Si5324 soft reset 

Needs easy board rework to cut trace at pin 1 of Si5324.
The Si5324 contains an internal pull-up on that pin.

Allows using Si5324 + HMC7043 chips at the same time.

Allows the Si5324 bypass hack for DDMTD experiments on the RTM.
pull/1261/head
Sebastien Bourdeauducq 2019-01-31 19:43:54 +08:00
parent 82106dcd95
commit 8119000982
1 changed files with 1 additions and 2 deletions
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3
artiq/gateware/targets/sayma_rtm_drtio.py
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@ -138,13 +138,12 @@ class _SatelliteBase(BaseSoC):
platform.add_false_path_constraints(
self.crg.cd_sys.clk, self.siphaser.mmcm_freerun_output)
self.csr_devices.append("siphaser")
self.submodules.si5324_rst_n = gpio.GPIOOut(platform.request("hmc7043_reset"))
self.csr_devices.append("si5324_rst_n")
i2c = self.platform.request("i2c")
self.submodules.i2c = gpio.GPIOTristate([i2c.scl, i2c.sda])
self.csr_devices.append("i2c")
self.config["I2C_BUS_COUNT"] = 1
self.config["HAS_SI5324"] = None
self.config["SI5324_SOFT_RESET"] = None
rtio_clk_period = 1e9/rtio_clk_freq
gtp = self.drtio_transceiver.gtps[0]