From 80606529133e5d66512acad213080b6b0ca5b9f1 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Thu, 24 Nov 2016 15:21:03 +0100 Subject: [PATCH] phaser: use Inout_8X --- artiq/gateware/targets/phaser.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/artiq/gateware/targets/phaser.py b/artiq/gateware/targets/phaser.py index 77a3aaf22..918882e00 100755 --- a/artiq/gateware/targets/phaser.py +++ b/artiq/gateware/targets/phaser.py @@ -201,12 +201,12 @@ class Phaser(MiniSoC, AMPSoC): rtio_channels.append(rtio.Channel.from_phy(phy)) sysref_pads = platform.request("ad9154_sysref") - phy = ttl_serdes_7series.Input_8X(sysref_pads.p, sysref_pads.n) + phy = ttl_serdes_7series.Inout_8X(sysref_pads.p, sysref_pads.n) self.submodules += phy rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=32, ofifo_depth=2)) - phy = ttl_simple.Input(self.ad9154.jesd.jsync) + phy = ttl_serdes_7series.Inout_8X(self.ad9154.jesd.jsync) self.submodules += phy rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=32, ofifo_depth=2))