From 7eb406747759ddf49941a7a360d4f4446e16a887 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 26 Dec 2015 21:10:19 +0800 Subject: [PATCH] test/coredevice/analyzer: test TTL input mode --- artiq/test/coredevice/analyzer.py | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/artiq/test/coredevice/analyzer.py b/artiq/test/coredevice/analyzer.py index 81b0d1cfd..fc0650fbe 100644 --- a/artiq/test/coredevice/analyzer.py +++ b/artiq/test/coredevice/analyzer.py @@ -1,16 +1,23 @@ from artiq.language import * -from artiq.coredevice.analyzer import decode_dump, OutputMessage +from artiq.coredevice.analyzer import decode_dump, OutputMessage, InputMessage from artiq.test.hardware_testbench import ExperimentCase class CreateTTLPulse(EnvExperiment): def build(self): self.setattr_device("core") - self.setattr_device("ttl_out") + self.setattr_device("ttl_inout") @kernel def run(self): - self.ttl_out.pulse_mu(1000) + self.ttl_inout.output() + delay_mu(100) + with parallel: + self.ttl_inout.gate_both_mu(1200) + with sequential: + delay_mu(100) + self.ttl_inout.pulse_mu(1000) + self.ttl_inout.count() class AnalyzerTest(ExperimentCase): @@ -24,9 +31,16 @@ class AnalyzerTest(ExperimentCase): exp.run() dump = decode_dump(comm.get_analyzer_dump()) - ttl_messages = [msg for msg in dump.messages - if isinstance(msg, OutputMessage)] - self.assertEqual(len(ttl_messages), 2) + output_messages = [msg for msg in dump.messages + if isinstance(msg, OutputMessage) + and msg.address == 0] + self.assertEqual(len(output_messages), 2) self.assertEqual( - abs(ttl_messages[0].timestamp - ttl_messages[1].timestamp), + abs(output_messages[0].timestamp - output_messages[1].timestamp), 1000) + input_messages = [msg for msg in dump.messages + if isinstance(msg, InputMessage)] + self.assertEqual(len(input_messages), 2) + self.assertAlmostEqual( + abs(input_messages[0].timestamp - input_messages[1].timestamp), + 1000, delta=1)