From 7e9fa3a81aa1f3ebda17a6d4b5c7f27880628404 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 11 Jun 2016 10:01:15 -0600 Subject: [PATCH] doc: add core device comms details --- doc/manual/core_device.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/doc/manual/core_device.rst b/doc/manual/core_device.rst index 6c5776194..0c5677d0c 100644 --- a/doc/manual/core_device.rst +++ b/doc/manual/core_device.rst @@ -24,6 +24,8 @@ This flash storage space can be accessed by using ``artiq_coreconfig`` (see: :re FPGA board ports **************** +All boards have a serial interface running at 115200bps 8-N-1 that can be used for debugging. + KC705 ----- @@ -156,6 +158,8 @@ The low-cost Pipistrello FPGA board can be used as a lower-cost but slower alter pppd /dev/ttyUSB1 115200 noauth nodetach local nocrtscts novj 10.0.0.1:10.0.0.2 +.. warning:: Windows is not supported. + When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are mapped to RTIO channels as follows: +--------------+------------+--------------+