mirror of https://github.com/m-labs/artiq.git
sayma_rtm: set CFGBVS/CONFIG_VOLTAGE, compress
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@ -72,6 +72,12 @@ CSR_RANGE_SIZE = 0x800
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class SaymaRTM(Module):
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class SaymaRTM(Module):
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def __init__(self, platform):
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def __init__(self, platform):
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platform.toolchain.bitstream_commands.extend([
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"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
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"set_property CFGBVS VCCO [current_design]",
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"set_property CONFIG_VOLTAGE 3.3 [current_design]",
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])
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csr_devices = []
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csr_devices = []
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self.submodules.crg = CRG(platform)
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self.submodules.crg = CRG(platform)
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