eem: add efc

artiq/coredevice/coredevice_generic.schema.json

@@ -142,7 +142,7 @@
             "properties": {
                 "type": {
                     "type": "string",
-                    "enum": ["dio", "dio_spi", "urukul", "novogorny", "sampler", "suservo", "zotino", "grabber", "mirny", "fastino", "phaser", "hvamp"]
+                    "enum": ["dio", "dio_spi", "urukul", "novogorny", "sampler", "suservo", "zotino", "grabber", "mirny", "fastino", "phaser", "hvamp", "efc"]
                 },
                 "board": {
                     "type": "string"
@@ -610,6 +610,28 @@
                     },
                     "required": ["ports"]
                 }
+            },{
+                "title": "EFC",
+                "if": {
+                    "properties": {
+                        "type": {
+                            "const": "efc"
+                        }
+                    }
+                },
+                "then": {
+                    "properties": {
+                        "ports": {
+                            "type": "array",
+                            "items": {
+                                "type": "integer"
+                            },
+                            "minItems": 1,
+                            "maxItems": 2
+                        }
+                    },
+                    "required": ["ports"]
+                }
             }]
         }
     }

artiq/gateware/eem.py

@@ -25,11 +25,15 @@ def default_iostandard(eem):
 
 class _EEM:
     @classmethod
-    def add_extension(cls, target, eem, *args, **kwargs):
+    def add_extension(cls, target, eem, *args, is_drtio_over_eem=False, **kwargs):
         name = cls.__name__
         target.platform.add_extension(cls.io(eem, *args, **kwargs))
-        print("{} (EEM{}) starting at RTIO channel 0x{:06x}"
+        if is_drtio_over_eem:
-              .format(name, eem, len(target.rtio_channels)))
+            print("{} (EEM{}) starting at DRTIO channel 0x{:06x}"
+                .format(name, eem, (len(target.drtio_transceiver.channels) + len(target.eem_drtio_channels) + 1) << 16))
+        else:
+            print("{} (EEM{}) starting at RTIO channel 0x{:06x}"
+                .format(name, eem, len(target.rtio_channels)))
 
 
 class DIO(_EEM):
@@ -785,3 +789,8 @@ class EFC(_EEM):
         )
 
         return [data_in, data_out]
+
+    @classmethod
+    def add_std(cls, target, eem, eem_aux, iostandard=default_iostandard):
+        cls.add_extension(target, eem, is_drtio_over_eem=True, iostandard=iostandard)
+        target.eem_drtio_channels.append((target.platform.request("efc{}_drtio_rx".format(eem), 0), target.platform.request("efc{}_drtio_tx".format(eem), 0)))

artiq/gateware/eem_7series.py

@@ -133,6 +133,15 @@ def peripheral_hvamp(module, peripheral, **kwargs):
     eem.HVAmp.add_std(module, peripheral["ports"][0],
         ttl_simple.Output, **kwargs)
 
+def peripheral_efc(module, peripheral, **kwargs):
+    if len(peripheral["ports"]) == 1:
+        port = peripheral["ports"][0]
+        port_aux = None
+    elif len(peripheral["ports"]) == 2:
+        port, port_aux = peripheral["ports"]
+    else:
+        raise ValueError("wrong number of ports")
+    eem.EFC.add_std(module, port, port_aux)
 
 peripheral_processors = {
     "dio": peripheral_dio,
@@ -147,6 +156,7 @@ peripheral_processors = {
     "fastino": peripheral_fastino,
     "phaser": peripheral_phaser,
     "hvamp": peripheral_hvamp,
+    "efc": peripheral_efc,
 }