mirror of https://github.com/m-labs/artiq.git
drtioaux_proto: use better payload names
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b42816582e
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6f4b8c641e
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@ -14,8 +14,11 @@ impl<T> From<IoError<T>> for Error<T> {
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}
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}
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pub const DMA_TRACE_MAX_SIZE: usize = /*max size*/512 - /*CRC*/4 - /*packet ID*/1 - /*trace ID*/4 - /*last*/1 -/*length*/2;
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pub const ANALYZER_MAX_SIZE: usize = /*max size*/512 - /*CRC*/4 - /*packet ID*/1 - /*last*/1 - /*length*/2;
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// maximum size of arbitrary payloads
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// used by satellite -> master analyzer, subkernel exceptions
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pub const SAT_PAYLOAD_MAX_SIZE: usize = /*max size*/512 - /*CRC*/4 - /*packet ID*/1 - /*last*/1 - /*length*/2;
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// used by DDMA, subkernel program data (need to provide extra ID and destination)
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pub const MASTER_PAYLOAD_MAX_SIZE: usize = SAT_PAYLOAD_MAX_SIZE - /*destination*/1 - /*ID*/4;
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#[derive(PartialEq, Debug)]
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pub enum Packet {
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@ -61,9 +64,9 @@ pub enum Packet {
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AnalyzerHeaderRequest { destination: u8 },
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AnalyzerHeader { sent_bytes: u32, total_byte_count: u64, overflow_occurred: bool },
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AnalyzerDataRequest { destination: u8 },
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AnalyzerData { last: bool, length: u16, data: [u8; ANALYZER_MAX_SIZE]},
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AnalyzerData { last: bool, length: u16, data: [u8; SAT_PAYLOAD_MAX_SIZE]},
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DmaAddTraceRequest { destination: u8, id: u32, last: bool, length: u16, trace: [u8; DMA_TRACE_MAX_SIZE] },
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DmaAddTraceRequest { destination: u8, id: u32, last: bool, length: u16, trace: [u8; MASTER_PAYLOAD_MAX_SIZE] },
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DmaAddTraceReply { succeeded: bool },
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DmaRemoveTraceRequest { destination: u8, id: u32 },
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DmaRemoveTraceReply { succeeded: bool },
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@ -215,7 +218,7 @@ impl Packet {
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0xa3 => {
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let mut data: [u8; ANALYZER_MAX_SIZE] = [0; ANALYZER_MAX_SIZE];
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let mut data: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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reader.read_exact(&mut data[0..length as usize])?;
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Packet::AnalyzerData {
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last: last,
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@ -229,7 +232,7 @@ impl Packet {
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let id = reader.read_u32()?;
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let mut trace: [u8; DMA_TRACE_MAX_SIZE] = [0; DMA_TRACE_MAX_SIZE];
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let mut trace: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
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reader.read_exact(&mut trace[0..length as usize])?;
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Packet::DmaAddTraceRequest {
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destination: destination,
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@ -17,7 +17,7 @@ pub mod drtio {
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use super::*;
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use alloc::vec::Vec;
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use drtioaux;
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use proto_artiq::drtioaux_proto::DMA_TRACE_MAX_SIZE;
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use proto_artiq::drtioaux_proto::MASTER_PAYLOAD_MAX_SIZE;
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use rtio_dma::remote_dma;
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#[cfg(has_rtio_analyzer)]
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use analyzer::remote_analyzer::RemoteBuffer;
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@ -372,30 +372,38 @@ pub mod drtio {
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}
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}
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pub fn ddma_upload_trace(io: &Io, aux_mutex: &Mutex, routing_table: &drtio_routing::RoutingTable,
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id: u32, destination: u8, trace: &Vec<u8>) -> Result<(), &'static str> {
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let linkno = routing_table.0[destination as usize][0] - 1;
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fn partition_data<F>(data: &[u8], send_f: F) -> Result<(), &'static str>
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where F: Fn(&[u8; MASTER_PAYLOAD_MAX_SIZE], bool, usize) -> Result<(), &'static str> {
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let mut i = 0;
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while i < trace.len() {
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let mut trace_slice: [u8; DMA_TRACE_MAX_SIZE] = [0; DMA_TRACE_MAX_SIZE];
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let len: usize = if i + DMA_TRACE_MAX_SIZE < trace.len() { DMA_TRACE_MAX_SIZE } else { trace.len() - i } as usize;
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let last = i + len == trace.len();
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trace_slice[..len].clone_from_slice(&trace[i..i+len]);
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while i < data.len() {
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let mut slice: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
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let len: usize = if i + MASTER_PAYLOAD_MAX_SIZE < data.len() { MASTER_PAYLOAD_MAX_SIZE } else { data.len() - i } as usize;
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let last = i + len == data.len();
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slice[..len].clone_from_slice(&data[i..i+len]);
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i += len;
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let reply = aux_transact(io, aux_mutex, linkno,
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&drtioaux::Packet::DmaAddTraceRequest {
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id: id, destination: destination, last: last, length: len as u16, trace: trace_slice});
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match reply {
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Ok(drtioaux::Packet::DmaAddTraceReply { succeeded: true }) => (),
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Ok(drtioaux::Packet::DmaAddTraceReply { succeeded: false }) => {
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return Err("error adding trace on satellite"); },
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Ok(_) => { return Err("adding DMA trace failed, unexpected aux packet"); },
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Err(_) => { return Err("adding DMA trace failed, aux error"); }
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}
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send_f(&slice, last, len)?;
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}
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Ok(())
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}
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pub fn ddma_upload_trace(io: &Io, aux_mutex: &Mutex,
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routing_table: &drtio_routing::RoutingTable,
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id: u32, destination: u8, trace: &[u8]) -> Result<(), &'static str> {
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let linkno = routing_table.0[destination as usize][0] - 1;
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partition_data(trace, |slice, last, len: usize| {
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let reply = aux_transact(io, aux_mutex, linkno,
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&drtioaux::Packet::DmaAddTraceRequest {
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id: id, destination: destination, last: last, length: len as u16, trace: *slice});
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match reply {
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Ok(drtioaux::Packet::DmaAddTraceReply { succeeded: true }) => Ok(()),
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Ok(drtioaux::Packet::DmaAddTraceReply { succeeded: false }) =>
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Err("error adding trace on satellite"),
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Ok(_) => Err("adding DMA trace failed, unexpected aux packet"),
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Err(_) => Err("adding DMA trace failed, aux error")
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}
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})
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}
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pub fn ddma_send_erase(io: &Io, aux_mutex: &Mutex, routing_table: &drtio_routing::RoutingTable,
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id: u32, destination: u8) -> Result<(), &'static str> {
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let linkno = routing_table.0[destination as usize][0] - 1;
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@ -1,6 +1,6 @@
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use core::cmp::min;
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use board_misoc::{csr, cache};
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use proto_artiq::drtioaux_proto::ANALYZER_MAX_SIZE;
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use proto_artiq::drtioaux_proto::SAT_PAYLOAD_MAX_SIZE;
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const BUFFER_SIZE: usize = 512 * 1024;
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@ -86,10 +86,10 @@ impl Analyzer {
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}
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}
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pub fn get_data(&mut self, data_slice: &mut [u8; ANALYZER_MAX_SIZE]) -> AnalyzerSliceMeta {
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pub fn get_data(&mut self, data_slice: &mut [u8; SAT_PAYLOAD_MAX_SIZE]) -> AnalyzerSliceMeta {
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let data = unsafe { &BUFFER.data[..] };
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let i = (self.data_pointer + self.sent_bytes) % BUFFER_SIZE;
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let len = min(ANALYZER_MAX_SIZE, self.data_len - self.sent_bytes);
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let len = min(SAT_PAYLOAD_MAX_SIZE, self.data_len - self.sent_bytes);
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let last = self.sent_bytes + len == self.data_len;
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if i + len >= BUFFER_SIZE {
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@ -17,8 +17,7 @@ use board_artiq::si5324;
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use board_artiq::{spi, drtioaux};
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#[cfg(soc_platform = "efc")]
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use board_artiq::ad9117;
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use board_artiq::drtio_routing;
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use proto_artiq::drtioaux_proto::ANALYZER_MAX_SIZE;
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use proto_artiq::drtioaux_proto::{SAT_PAYLOAD_MAX_SIZE, MASTER_PAYLOAD_MAX_SIZE};
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#[cfg(has_drtio_eem)]
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use board_artiq::drtio_eem;
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use riscv::register::{mcause, mepc, mtval};
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@ -328,7 +327,7 @@ fn process_aux_packet(_manager: &mut DmaManager, analyzer: &mut Analyzer, _repea
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drtioaux::Packet::AnalyzerDataRequest { destination: _destination } => {
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forward!(_routing_table, _destination, *_rank, _repeaters, &packet);
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let mut data_slice: [u8; ANALYZER_MAX_SIZE] = [0; ANALYZER_MAX_SIZE];
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let mut data_slice: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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let meta = analyzer.get_data(&mut data_slice);
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drtioaux::send(0, &drtioaux::Packet::AnalyzerData {
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last: meta.last,
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