rtio: add explanation about cri.counter

2017-09-19 12:05:12 +08:00 · 2017-09-19 12:05:12 +08:00 · 6dc9cad2c9
parent 81d6317053
commit 6dc9cad2c9
1 changed files with 3 additions and 0 deletions
--- a/artiq/gateware/rtio/cri.py
+++ b/artiq/gateware/rtio/cri.py
@ -35,6 +35,9 @@ layout = [
    # <0> and <1> are mutually exclusive. <1> has higher priority.
    ("i_status", 3, DIR_S_TO_M),

+    # value of the timestamp counter transferred into the CRI clock domain.
+    # monotonic, may lag behind the counter in the IO clock domain, but
+    # not be ahead of it.
    ("counter", 64, DIR_S_TO_M)
 ]