M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-26 11:48:27 +08:00
Code Issues Projects Releases Wiki Activity

rtio/sed/OutputDriver: support channels with different fine timestamp widths

Browse Source
This commit is contained in:
Sebastien Bourdeauducq 2017-09-16 10:53:30 +08:00
parent f39ee7ad62
commit 6b7a1893c7
1 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
artiq/gateware/rtio/sed/output_driver.py
View File

@ -61,6 +61,8 @@ class OutputDriver(Module):
# demultiplex channels (adds one pipeline stage)
for n, channel in enumerate(channels):
oif = channel.interface.o
onehot_stb = []
onehot_fine_ts = []
onehot_address = []
@ -69,14 +71,14 @@ class OutputDriver(Module):
selected = Signal()
self.comb += selected.eq(lane_data.valid & ~lane_data.collision & (lane_data.payload.channel == n))
onehot_stb.append(selected)
if hasattr(lane_data.payload, "fine_ts"):
onehot_fine_ts.append(Mux(selected, lane_data.payload.fine_ts, 0))
if hasattr(lane_data.payload, "fine_ts") and hasattr(oif, "fine_ts"):
ts_shift = len(lane_data.payload.fine_ts) - len(oif.fine_ts)
onehot_fine_ts.append(Mux(selected, lane_data.payload.fine_ts[ts_shift:], 0))
if hasattr(lane_data.payload, "address"):
onehot_address.append(Mux(selected, lane_data.payload.address, 0))
if hasattr(lane_data.payload, "data"):
onehot_data.append(Mux(selected, lane_data.payload.data, 0))
oif = channel.interface.o
self.sync += oif.stb.eq(reduce(or_, onehot_stb))
if hasattr(oif, "fine_ts"):
self.sync += oif.fine_ts.eq(reduce(or_, onehot_fine_ts))