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runtime mgmt: avoid passing incomplete message to corelog

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occheung 2024-09-19 17:42:03 +08:00
parent 28654501af
commit 6b6bcdb6d6
1 changed files with 8 additions and 2 deletions
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10
artiq/firmware/runtime/mgmt.rs
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@ -269,14 +269,20 @@ mod remote_coremgmt {
ddma_mutex: &Mutex, subkernel_mutex: &Mutex, ddma_mutex: &Mutex, subkernel_mutex: &Mutex,
routing_table: &RoutingTable, linkno: u8, routing_table: &RoutingTable, linkno: u8,
destination: u8, stream: &mut TcpStream) -> Result<(), Error<SchedError>> { destination: u8, stream: &mut TcpStream) -> Result<(), Error<SchedError>> {
let mut buffer = Vec::new();
loop { loop {
let reply = drtio::aux_transact(io, aux_mutex, ddma_mutex, subkernel_mutex, routing_table, linkno, let reply = drtio::aux_transact(io, aux_mutex, ddma_mutex, subkernel_mutex, routing_table, linkno,
&Packet::CoreMgmtGetLogRequest { destination, clear: true } &Packet::CoreMgmtGetLogRequest { destination, clear: true }
); );
match reply { match reply {
Ok(Packet::CoreMgmtGetLogReply { last: _, length, data }) => { Ok(Packet::CoreMgmtGetLogReply { last, length, data }) => {
stream.write_bytes(&data[..length as usize])?; buffer.extend(&data[..length as usize]);
if last {
stream.write_bytes(&buffer[..length as usize])?;
buffer.clear();
}
} }
Ok(packet) => { Ok(packet) => {
error!("received unexpected aux packet: {:?}", packet); error!("received unexpected aux packet: {:?}", packet);