mirror of https://github.com/m-labs/artiq.git
llvm-or1k: fix clang patch, move to patch files, add REQUIRES_RTTI note
This commit is contained in:
parent
fa6fc0cf75
commit
668e76fa02
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@ -1,395 +1,19 @@
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Source repositories:
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checkout https://github.com/openrisc/llvm-or1k
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https://github.com/openrisc/llvm-or1k
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commit b3a48efb2c05ed6cedc5395ae726c6a6573ef3ba
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https://github.com/openrisc/clang-or1k
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into $LLVM_SRC
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https://github.com/llvmpy/llvmpy (branch: llvm-3.4)
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apply patches/llvm/*
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Known to work commit IDs:
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checkout https://github.com/openrisc/clang-or1k
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LLVM (needs revert): b3a48efb2c05ed6cedc5395ae726c6a6573ef3ba
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commit 02d831c7e7dc1517abed9cc96abdfb937af954eb
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Clang (needs revert): 02d831c7e7dc1517abed9cc96abdfb937af954eb
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into $LLVM_SRC/tools/clang
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llvmpy (head OK): 7af2f7140391d4f708adf2721e84f23c1b89e97a
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apply patches/clang/*
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Clang patch:
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in $LLVM_SRC
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diff --cc lib/CodeGen/CGBuiltin.cpp
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./configure --prefix=/usr/local/llvm-or1k
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index 52e40db,d06c660..0000000
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make ENABLE_OPTIMIZED=1 REQUIRES_RTTI=1
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--- a/lib/CodeGen/CGBuiltin.cpp
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ENABLE_OPTIMIZED=1 sudo -E checkinstall
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+++ b/lib/CodeGen/CGBuiltin.cpp
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@@@ -1760,191 -1766,352 +1760,6 @@@ static Value *EmitAArch64ScalarBuiltinE
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// argument that specifies the vector type, need to handle each case.
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switch (BuiltinID) {
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default: break;
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-- // Scalar Add
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-- case AArch64::BI__builtin_neon_vaddd_s64:
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-- Int = Intrinsic::aarch64_neon_vaddds;
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-- s = "vaddds"; break;
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-- case AArch64::BI__builtin_neon_vaddd_u64:
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-- Int = Intrinsic::aarch64_neon_vadddu;
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-- s = "vadddu"; break;
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-- // Scalar Sub
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-- case AArch64::BI__builtin_neon_vsubd_s64:
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-- Int = Intrinsic::aarch64_neon_vsubds;
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-- s = "vsubds"; break;
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-- case AArch64::BI__builtin_neon_vsubd_u64:
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-- Int = Intrinsic::aarch64_neon_vsubdu;
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-- s = "vsubdu"; break;
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-- // Scalar Saturating Add
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-- case AArch64::BI__builtin_neon_vqaddb_s8:
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-- case AArch64::BI__builtin_neon_vqaddh_s16:
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-- case AArch64::BI__builtin_neon_vqadds_s32:
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-- case AArch64::BI__builtin_neon_vqaddd_s64:
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-- Int = Intrinsic::aarch64_neon_vqadds;
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-- s = "vqadds"; OverloadInt = true; break;
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-- case AArch64::BI__builtin_neon_vqaddb_u8:
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-- case AArch64::BI__builtin_neon_vqaddh_u16:
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-- case AArch64::BI__builtin_neon_vqadds_u32:
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-- case AArch64::BI__builtin_neon_vqaddd_u64:
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-- Int = Intrinsic::aarch64_neon_vqaddu;
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-- s = "vqaddu"; OverloadInt = true; break;
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-- // Scalar Saturating Sub
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-- case AArch64::BI__builtin_neon_vqsubb_s8:
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-- case AArch64::BI__builtin_neon_vqsubh_s16:
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-- case AArch64::BI__builtin_neon_vqsubs_s32:
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-- case AArch64::BI__builtin_neon_vqsubd_s64:
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-- Int = Intrinsic::aarch64_neon_vqsubs;
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-- s = "vqsubs"; OverloadInt = true; break;
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-- case AArch64::BI__builtin_neon_vqsubb_u8:
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-- case AArch64::BI__builtin_neon_vqsubh_u16:
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-- case AArch64::BI__builtin_neon_vqsubs_u32:
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-- case AArch64::BI__builtin_neon_vqsubd_u64:
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-- Int = Intrinsic::aarch64_neon_vqsubu;
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-- s = "vqsubu"; OverloadInt = true; break;
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-- // Scalar Shift Left
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-- case AArch64::BI__builtin_neon_vshld_s64:
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-- Int = Intrinsic::aarch64_neon_vshlds;
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-- s = "vshlds"; break;
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-- case AArch64::BI__builtin_neon_vshld_u64:
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-- Int = Intrinsic::aarch64_neon_vshldu;
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-- s = "vshldu"; break;
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-- // Scalar Saturating Shift Left
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-- case AArch64::BI__builtin_neon_vqshlb_s8:
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-- case AArch64::BI__builtin_neon_vqshlh_s16:
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-- case AArch64::BI__builtin_neon_vqshls_s32:
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-- case AArch64::BI__builtin_neon_vqshld_s64:
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-- Int = Intrinsic::aarch64_neon_vqshls;
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-- s = "vqshls"; OverloadInt = true; break;
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-- case AArch64::BI__builtin_neon_vqshlb_u8:
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-- case AArch64::BI__builtin_neon_vqshlh_u16:
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-- case AArch64::BI__builtin_neon_vqshls_u32:
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-- case AArch64::BI__builtin_neon_vqshld_u64:
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-- Int = Intrinsic::aarch64_neon_vqshlu;
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-- s = "vqshlu"; OverloadInt = true; break;
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-- // Scalar Rouding Shift Left
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-- case AArch64::BI__builtin_neon_vrshld_s64:
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-- Int = Intrinsic::aarch64_neon_vrshlds;
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-- s = "vrshlds"; break;
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-- case AArch64::BI__builtin_neon_vrshld_u64:
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-- Int = Intrinsic::aarch64_neon_vrshldu;
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-- s = "vrshldu"; break;
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-- // Scalar Saturating Rouding Shift Left
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-- case AArch64::BI__builtin_neon_vqrshlb_s8:
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-- case AArch64::BI__builtin_neon_vqrshlh_s16:
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-- case AArch64::BI__builtin_neon_vqrshls_s32:
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-- case AArch64::BI__builtin_neon_vqrshld_s64:
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-- Int = Intrinsic::aarch64_neon_vqrshls;
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-- s = "vqrshls"; OverloadInt = true; break;
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-- case AArch64::BI__builtin_neon_vqrshlb_u8:
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-- case AArch64::BI__builtin_neon_vqrshlh_u16:
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-- case AArch64::BI__builtin_neon_vqrshls_u32:
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-- case AArch64::BI__builtin_neon_vqrshld_u64:
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-- Int = Intrinsic::aarch64_neon_vqrshlu;
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-- s = "vqrshlu"; OverloadInt = true; break;
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-- // Scalar Reduce Pairwise Add
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-- case AArch64::BI__builtin_neon_vpaddd_s64:
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-- Int = Intrinsic::aarch64_neon_vpadd; s = "vpadd";
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-- break;
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-- case AArch64::BI__builtin_neon_vpadds_f32:
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-- Int = Intrinsic::aarch64_neon_vpfadd; s = "vpfadd";
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-- break;
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-- case AArch64::BI__builtin_neon_vpaddd_f64:
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-- Int = Intrinsic::aarch64_neon_vpfaddq; s = "vpfaddq";
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-- break;
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-- // Scalar Reduce Pairwise Floating Point Max
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-- case AArch64::BI__builtin_neon_vpmaxs_f32:
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-- Int = Intrinsic::aarch64_neon_vpmax; s = "vpmax";
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-- break;
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-- case AArch64::BI__builtin_neon_vpmaxqd_f64:
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-- Int = Intrinsic::aarch64_neon_vpmaxq; s = "vpmaxq";
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-- break;
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-- // Scalar Reduce Pairwise Floating Point Min
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-- case AArch64::BI__builtin_neon_vpmins_f32:
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-- Int = Intrinsic::aarch64_neon_vpmin; s = "vpmin";
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-- break;
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-- case AArch64::BI__builtin_neon_vpminqd_f64:
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-- Int = Intrinsic::aarch64_neon_vpminq; s = "vpminq";
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-- break;
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-- // Scalar Reduce Pairwise Floating Point Maxnm
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-- case AArch64::BI__builtin_neon_vpmaxnms_f32:
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-- Int = Intrinsic::aarch64_neon_vpfmaxnm; s = "vpfmaxnm";
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-- break;
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-- case AArch64::BI__builtin_neon_vpmaxnmqd_f64:
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-- Int = Intrinsic::aarch64_neon_vpfmaxnmq; s = "vpfmaxnmq";
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-- break;
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-- // Scalar Reduce Pairwise Floating Point Minnm
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-- case AArch64::BI__builtin_neon_vpminnms_f32:
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-- Int = Intrinsic::aarch64_neon_vpfminnm; s = "vpfminnm";
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-- break;
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-- case AArch64::BI__builtin_neon_vpminnmqd_f64:
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-- Int = Intrinsic::aarch64_neon_vpfminnmq; s = "vpfminnmq";
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-- break;
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-- // The followings are intrinsics with scalar results generated AcrossVec vectors
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- #if 0
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-- case AArch64::BI__builtin_neon_vaddlv_s8:
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-- case AArch64::BI__builtin_neon_vaddlv_s16:
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-- case AArch64::BI__builtin_neon_vaddlvq_s8:
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-- case AArch64::BI__builtin_neon_vaddlvq_s16:
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-- case AArch64::BI__builtin_neon_vaddlvq_s32:
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-- Int = Intrinsic::aarch64_neon_saddlv;
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-- AcrossVec = true; ExtendEle = true; s = "saddlv"; break;
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-- case AArch64::BI__builtin_neon_vaddlv_u8:
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-- case AArch64::BI__builtin_neon_vaddlv_u16:
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-- case AArch64::BI__builtin_neon_vaddlvq_u8:
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-- case AArch64::BI__builtin_neon_vaddlvq_u16:
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-- case AArch64::BI__builtin_neon_vaddlvq_u32:
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-- Int = Intrinsic::aarch64_neon_uaddlv;
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-- AcrossVec = true; ExtendEle = true; s = "uaddlv"; break;
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-- case AArch64::BI__builtin_neon_vmaxv_s8:
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-- case AArch64::BI__builtin_neon_vmaxv_s16:
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-- case AArch64::BI__builtin_neon_vmaxvq_s8:
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-- case AArch64::BI__builtin_neon_vmaxvq_s16:
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-- case AArch64::BI__builtin_neon_vmaxvq_s32:
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-- Int = Intrinsic::aarch64_neon_smaxv;
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-- AcrossVec = true; ExtendEle = false; s = "smaxv"; break;
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-- case AArch64::BI__builtin_neon_vmaxv_u8:
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-- case AArch64::BI__builtin_neon_vmaxv_u16:
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-- case AArch64::BI__builtin_neon_vmaxvq_u8:
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-- case AArch64::BI__builtin_neon_vmaxvq_u16:
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-- case AArch64::BI__builtin_neon_vmaxvq_u32:
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-- Int = Intrinsic::aarch64_neon_umaxv;
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-- AcrossVec = true; ExtendEle = false; s = "umaxv"; break;
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-- case AArch64::BI__builtin_neon_vminv_s8:
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-- case AArch64::BI__builtin_neon_vminv_s16:
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-- case AArch64::BI__builtin_neon_vminvq_s8:
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-- case AArch64::BI__builtin_neon_vminvq_s16:
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-- case AArch64::BI__builtin_neon_vminvq_s32:
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-- Int = Intrinsic::aarch64_neon_sminv;
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-- AcrossVec = true; ExtendEle = false; s = "sminv"; break;
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-- case AArch64::BI__builtin_neon_vminv_u8:
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-- case AArch64::BI__builtin_neon_vminv_u16:
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-- case AArch64::BI__builtin_neon_vminvq_u8:
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-- case AArch64::BI__builtin_neon_vminvq_u16:
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-- case AArch64::BI__builtin_neon_vminvq_u32:
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-- Int = Intrinsic::aarch64_neon_uminv;
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-- AcrossVec = true; ExtendEle = false; s = "uminv"; break;
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-- case AArch64::BI__builtin_neon_vaddv_s8:
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-- case AArch64::BI__builtin_neon_vaddv_s16:
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-- case AArch64::BI__builtin_neon_vaddvq_s8:
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-- case AArch64::BI__builtin_neon_vaddvq_s16:
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-- case AArch64::BI__builtin_neon_vaddvq_s32:
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-- case AArch64::BI__builtin_neon_vaddv_u8:
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-- case AArch64::BI__builtin_neon_vaddv_u16:
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-- case AArch64::BI__builtin_neon_vaddvq_u8:
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-- case AArch64::BI__builtin_neon_vaddvq_u16:
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-- case AArch64::BI__builtin_neon_vaddvq_u32:
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-- Int = Intrinsic::aarch64_neon_vaddv;
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-- AcrossVec = true; ExtendEle = false; s = "vaddv"; break;
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-- case AArch64::BI__builtin_neon_vmaxvq_f32:
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-- Int = Intrinsic::aarch64_neon_vmaxv;
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-- AcrossVec = true; ExtendEle = false; s = "vmaxv"; break;
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-- case AArch64::BI__builtin_neon_vminvq_f32:
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-- Int = Intrinsic::aarch64_neon_vminv;
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-- AcrossVec = true; ExtendEle = false; s = "vminv"; break;
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-- case AArch64::BI__builtin_neon_vmaxnmvq_f32:
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-- Int = Intrinsic::aarch64_neon_vmaxnmv;
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-- AcrossVec = true; ExtendEle = false; s = "vmaxnmv"; break;
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-- case AArch64::BI__builtin_neon_vminnmvq_f32:
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-- Int = Intrinsic::aarch64_neon_vminnmv;
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-- AcrossVec = true; ExtendEle = false; s = "vminnmv"; break;
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- // Scalar Integer Saturating Doubling Multiply Half High
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- case AArch64::BI__builtin_neon_vqdmulhh_s16:
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- case AArch64::BI__builtin_neon_vqdmulhs_s32:
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- Int = Intrinsic::arm_neon_vqdmulh;
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- s = "vqdmulh"; OverloadInt = true; break;
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- // Scalar Integer Saturating Rounding Doubling Multiply Half High
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- case AArch64::BI__builtin_neon_vqrdmulhh_s16:
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- case AArch64::BI__builtin_neon_vqrdmulhs_s32:
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- Int = Intrinsic::arm_neon_vqrdmulh;
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- s = "vqrdmulh"; OverloadInt = true; break;
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- // Scalar Floating-point Multiply Extended
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- case AArch64::BI__builtin_neon_vmulxs_f32:
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- case AArch64::BI__builtin_neon_vmulxd_f64:
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- Int = Intrinsic::aarch64_neon_vmulx;
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- s = "vmulx"; OverloadInt = true; break;
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- // Scalar Floating-point Reciprocal Step and
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- case AArch64::BI__builtin_neon_vrecpss_f32:
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- case AArch64::BI__builtin_neon_vrecpsd_f64:
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- Int = Intrinsic::arm_neon_vrecps;
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- s = "vrecps"; OverloadInt = true; break;
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- // Scalar Floating-point Reciprocal Square Root Step
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- case AArch64::BI__builtin_neon_vrsqrtss_f32:
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- case AArch64::BI__builtin_neon_vrsqrtsd_f64:
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- Int = Intrinsic::arm_neon_vrsqrts;
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- s = "vrsqrts"; OverloadInt = true; break;
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- // Scalar Signed Integer Convert To Floating-point
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- case AArch64::BI__builtin_neon_vcvts_f32_s32:
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- Int = Intrinsic::aarch64_neon_vcvtf32_s32,
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- s = "vcvtf"; OverloadInt = false; break;
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- case AArch64::BI__builtin_neon_vcvtd_f64_s64:
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- Int = Intrinsic::aarch64_neon_vcvtf64_s64,
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- s = "vcvtf"; OverloadInt = false; break;
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- // Scalar Unsigned Integer Convert To Floating-point
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- case AArch64::BI__builtin_neon_vcvts_f32_u32:
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- Int = Intrinsic::aarch64_neon_vcvtf32_u32,
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- s = "vcvtf"; OverloadInt = false; break;
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- case AArch64::BI__builtin_neon_vcvtd_f64_u64:
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- Int = Intrinsic::aarch64_neon_vcvtf64_u64,
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- s = "vcvtf"; OverloadInt = false; break;
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- // Scalar Floating-point Reciprocal Estimate
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- case AArch64::BI__builtin_neon_vrecpes_f32:
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- case AArch64::BI__builtin_neon_vrecped_f64:
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- Int = Intrinsic::arm_neon_vrecpe;
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- s = "vrecpe"; OverloadInt = true; break;
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- // Scalar Floating-point Reciprocal Exponent
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- case AArch64::BI__builtin_neon_vrecpxs_f32:
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- case AArch64::BI__builtin_neon_vrecpxd_f64:
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- Int = Intrinsic::aarch64_neon_vrecpx;
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|
||||||
- s = "vrecpx"; OverloadInt = true; break;
|
|
||||||
- // Scalar Floating-point Reciprocal Square Root Estimate
|
|
||||||
- case AArch64::BI__builtin_neon_vrsqrtes_f32:
|
|
||||||
- case AArch64::BI__builtin_neon_vrsqrted_f64:
|
|
||||||
- Int = Intrinsic::arm_neon_vrsqrte;
|
|
||||||
- s = "vrsqrte"; OverloadInt = true; break;
|
|
||||||
- // Scalar Compare Equal
|
|
||||||
- case AArch64::BI__builtin_neon_vceqd_s64:
|
|
||||||
- case AArch64::BI__builtin_neon_vceqd_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vceq; s = "vceq";
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Equal To Zero
|
|
||||||
- case AArch64::BI__builtin_neon_vceqzd_s64:
|
|
||||||
- case AArch64::BI__builtin_neon_vceqzd_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vceq; s = "vceq";
|
|
||||||
- // Add implicit zero operand.
|
|
||||||
- Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType()));
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Greater Than or Equal
|
|
||||||
- case AArch64::BI__builtin_neon_vcged_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcge; s = "vcge";
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- case AArch64::BI__builtin_neon_vcged_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vchs; s = "vcge";
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Greater Than or Equal To Zero
|
|
||||||
- case AArch64::BI__builtin_neon_vcgezd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcge; s = "vcge";
|
|
||||||
- // Add implicit zero operand.
|
|
||||||
- Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType()));
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Greater Than
|
|
||||||
- case AArch64::BI__builtin_neon_vcgtd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcgt; s = "vcgt";
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- case AArch64::BI__builtin_neon_vcgtd_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vchi; s = "vcgt";
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Greater Than Zero
|
|
||||||
- case AArch64::BI__builtin_neon_vcgtzd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcgt; s = "vcgt";
|
|
||||||
- // Add implicit zero operand.
|
|
||||||
- Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType()));
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Less Than or Equal
|
|
||||||
- case AArch64::BI__builtin_neon_vcled_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcge; s = "vcge";
|
|
||||||
- OverloadInt = false; std::swap(Ops[0], Ops[1]); break;
|
|
||||||
- case AArch64::BI__builtin_neon_vcled_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vchs; s = "vchs";
|
|
||||||
- OverloadInt = false; std::swap(Ops[0], Ops[1]); break;
|
|
||||||
- // Scalar Compare Less Than or Equal To Zero
|
|
||||||
- case AArch64::BI__builtin_neon_vclezd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vclez; s = "vcle";
|
|
||||||
- // Add implicit zero operand.
|
|
||||||
- Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType()));
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Less Than
|
|
||||||
- case AArch64::BI__builtin_neon_vcltd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcgt; s = "vcgt";
|
|
||||||
- OverloadInt = false; std::swap(Ops[0], Ops[1]); break;
|
|
||||||
- case AArch64::BI__builtin_neon_vcltd_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vchi; s = "vchi";
|
|
||||||
- OverloadInt = false; std::swap(Ops[0], Ops[1]); break;
|
|
||||||
- // Scalar Compare Less Than Zero
|
|
||||||
- case AArch64::BI__builtin_neon_vcltzd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vcltz; s = "vclt";
|
|
||||||
- // Add implicit zero operand.
|
|
||||||
- Ops.push_back(llvm::Constant::getNullValue(Ops[0]->getType()));
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Compare Bitwise Test Bits
|
|
||||||
- case AArch64::BI__builtin_neon_vtstd_s64:
|
|
||||||
- case AArch64::BI__builtin_neon_vtstd_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vtstd; s = "vtst";
|
|
||||||
- OverloadInt = false; break;
|
|
||||||
- // Scalar Absolute Value
|
|
||||||
- case AArch64::BI__builtin_neon_vabsd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vabs;
|
|
||||||
- s = "vabs"; OverloadInt = false; break;
|
|
||||||
- // Scalar Signed Saturating Absolute Value
|
|
||||||
- case AArch64::BI__builtin_neon_vqabsb_s8:
|
|
||||||
- case AArch64::BI__builtin_neon_vqabsh_s16:
|
|
||||||
- case AArch64::BI__builtin_neon_vqabss_s32:
|
|
||||||
- case AArch64::BI__builtin_neon_vqabsd_s64:
|
|
||||||
- Int = Intrinsic::arm_neon_vqabs;
|
|
||||||
- s = "vqabs"; OverloadInt = true; break;
|
|
||||||
- // Scalar Negate
|
|
||||||
- case AArch64::BI__builtin_neon_vnegd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vneg;
|
|
||||||
- s = "vneg"; OverloadInt = false; break;
|
|
||||||
- // Scalar Signed Saturating Negate
|
|
||||||
- case AArch64::BI__builtin_neon_vqnegb_s8:
|
|
||||||
- case AArch64::BI__builtin_neon_vqnegh_s16:
|
|
||||||
- case AArch64::BI__builtin_neon_vqnegs_s32:
|
|
||||||
- case AArch64::BI__builtin_neon_vqnegd_s64:
|
|
||||||
- Int = Intrinsic::arm_neon_vqneg;
|
|
||||||
- s = "vqneg"; OverloadInt = true; break;
|
|
||||||
- // Scalar Signed Saturating Accumulated of Unsigned Value
|
|
||||||
- case AArch64::BI__builtin_neon_vuqaddb_s8:
|
|
||||||
- case AArch64::BI__builtin_neon_vuqaddh_s16:
|
|
||||||
- case AArch64::BI__builtin_neon_vuqadds_s32:
|
|
||||||
- case AArch64::BI__builtin_neon_vuqaddd_s64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vuqadd;
|
|
||||||
- s = "vuqadd"; OverloadInt = true; break;
|
|
||||||
- // Scalar Unsigned Saturating Accumulated of Signed Value
|
|
||||||
- case AArch64::BI__builtin_neon_vsqaddb_u8:
|
|
||||||
- case AArch64::BI__builtin_neon_vsqaddh_u16:
|
|
||||||
- case AArch64::BI__builtin_neon_vsqadds_u32:
|
|
||||||
- case AArch64::BI__builtin_neon_vsqaddd_u64:
|
|
||||||
- Int = Intrinsic::aarch64_neon_vsqadd;
|
|
||||||
- s = "vsqadd"; OverloadInt = true; break;
|
|
||||||
- #endif
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!Int)
|
|
||||||
|
|
||||||
LLVM patch:
|
checkout https://github.com/llvmpy/llvmpy
|
||||||
diff --git a/lib/Target/OR1K/OR1KTargetMachine.cpp b/lib/Target/OR1K/OR1KTargetMachine.cpp
|
branch: llvm-3.4, 7af2f7140391d4f708adf2721e84f23c1b89e97a
|
||||||
index 8f260f0..1771bce 100644
|
apply patches/llvmpy/*
|
||||||
--- a/lib/Target/OR1K/OR1KTargetMachine.cpp
|
LLVM_CONFIG_PATH=/usr/local/llvm-or1k/bin/llvm-config pip3 install --user .
|
||||||
+++ b/lib/Target/OR1K/OR1KTargetMachine.cpp
|
|
||||||
@@ -41,6 +41,7 @@ OR1KTargetMachine(const Target &T, StringRef TT,
|
|
||||||
"f64:32:32-v64:32:32-v128:32:32-a0:0:32-n32"),
|
|
||||||
InstrInfo(), TLInfo(*this), TSInfo(*this),
|
|
||||||
FrameLowering(Subtarget) {
|
|
||||||
+ initAsmInfo();
|
|
||||||
}
|
|
||||||
namespace {
|
|
||||||
/// OR1K Code Generator Pass Configuration Options.
|
|
||||||
|
|
||||||
In llvmpy, edit core.py and replace line 177:
|
|
||||||
|
|
||||||
if llvm.version <= (3, 3):
|
|
||||||
OPCODE_ICMP = 45
|
|
||||||
OPCODE_FCMP = 46
|
|
||||||
...
|
|
||||||
|
|
||||||
with:
|
|
||||||
if True:
|
|
||||||
OPCODE_ICMP = 45
|
|
||||||
OPCODE_FCMP = 46
|
|
||||||
...
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,32 @@
|
||||||
|
From af106d252693b6af5c94d241fabed1c04cbb2fc6 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Jordens <jordens@gmail.com>
|
||||||
|
Date: Tue, 8 Jul 2014 22:35:58 -0600
|
||||||
|
Subject: [PATCH] exclude some broken aarch64 builtins
|
||||||
|
|
||||||
|
---
|
||||||
|
lib/CodeGen/CGBuiltin.cpp | 2 ++
|
||||||
|
1 file changed, 2 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
|
||||||
|
index 52e40db..d089ad3 100644
|
||||||
|
--- a/lib/CodeGen/CGBuiltin.cpp
|
||||||
|
+++ b/lib/CodeGen/CGBuiltin.cpp
|
||||||
|
@@ -1760,6 +1760,7 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
|
||||||
|
// argument that specifies the vector type, need to handle each case.
|
||||||
|
switch (BuiltinID) {
|
||||||
|
default: break;
|
||||||
|
+#if 0
|
||||||
|
// Scalar Add
|
||||||
|
case AArch64::BI__builtin_neon_vaddd_s64:
|
||||||
|
Int = Intrinsic::aarch64_neon_vaddds;
|
||||||
|
@@ -1945,6 +1946,7 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
|
||||||
|
case AArch64::BI__builtin_neon_vminnmvq_f32:
|
||||||
|
Int = Intrinsic::aarch64_neon_vminnmv;
|
||||||
|
AcrossVec = true; ExtendEle = false; s = "vminnmv"; break;
|
||||||
|
+#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!Int)
|
||||||
|
--
|
||||||
|
1.9.1
|
||||||
|
|
||||||
|
|
@ -0,0 +1,24 @@
|
||||||
|
From 4dd12eaf0a14196f45ce4f25ed4a9f23bb3f55d5 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Jordens <jordens@gmail.com>
|
||||||
|
Date: Tue, 8 Jul 2014 22:37:03 -0600
|
||||||
|
Subject: [PATCH] or1k: initAsmInfo()
|
||||||
|
|
||||||
|
---
|
||||||
|
lib/Target/OR1K/OR1KTargetMachine.cpp | 1 +
|
||||||
|
1 file changed, 1 insertion(+)
|
||||||
|
|
||||||
|
diff --git a/lib/Target/OR1K/OR1KTargetMachine.cpp b/lib/Target/OR1K/OR1KTargetMachine.cpp
|
||||||
|
index 8f260f0..1771bce 100644
|
||||||
|
--- a/lib/Target/OR1K/OR1KTargetMachine.cpp
|
||||||
|
+++ b/lib/Target/OR1K/OR1KTargetMachine.cpp
|
||||||
|
@@ -41,6 +41,7 @@ OR1KTargetMachine(const Target &T, StringRef TT,
|
||||||
|
"f64:32:32-v64:32:32-v128:32:32-a0:0:32-n32"),
|
||||||
|
InstrInfo(), TLInfo(*this), TSInfo(*this),
|
||||||
|
FrameLowering(Subtarget) {
|
||||||
|
+ initAsmInfo();
|
||||||
|
}
|
||||||
|
namespace {
|
||||||
|
/// OR1K Code Generator Pass Configuration Options.
|
||||||
|
--
|
||||||
|
1.9.1
|
||||||
|
|
||||||
|
|
@ -0,0 +1,25 @@
|
||||||
|
From 7f84a57f4a73837e50df7a8c6905773c0de568ab Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Jordens <jordens@gmail.com>
|
||||||
|
Date: Tue, 8 Jul 2014 22:40:10 -0600
|
||||||
|
Subject: [PATCH] use 3.3 opcodes
|
||||||
|
|
||||||
|
---
|
||||||
|
llvm/core.py | 2 +-
|
||||||
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||||
|
|
||||||
|
diff --git a/llvm/core.py b/llvm/core.py
|
||||||
|
index 20ad062..d33860f 100644
|
||||||
|
--- a/llvm/core.py
|
||||||
|
+++ b/llvm/core.py
|
||||||
|
@@ -174,7 +174,7 @@ class OpcodeEnum(Enum):
|
||||||
|
OPCODE_PTRTOINT = 42
|
||||||
|
OPCODE_INTTOPTR = 43
|
||||||
|
OPCODE_BITCAST = 44
|
||||||
|
- if llvm.version <= (3, 3):
|
||||||
|
+ if llvm.version <= (3, 3) or True:
|
||||||
|
OPCODE_ICMP = 45
|
||||||
|
OPCODE_FCMP = 46
|
||||||
|
OPCODE_PHI = 47
|
||||||
|
--
|
||||||
|
1.9.1
|
||||||
|
|
||||||
Loading…
Reference in New Issue