diff --git a/artiq/frontend/artiq_ddb_template.py b/artiq/frontend/artiq_ddb_template.py index 58883d6c8..04813ad9e 100755 --- a/artiq/frontend/artiq_ddb_template.py +++ b/artiq/frontend/artiq_ddb_template.py @@ -191,9 +191,9 @@ class PeripheralManager: "module": "artiq.coredevice.ad9910", "class": "AD9910", "arguments": {{ - "pll_n": 32, + "pll_n": {pll_n}, "chip_select": {chip_select}, - "cpld_device": "{name}_cpld"{pll_vco}{sync_delay_seed}{io_update_delay} + "cpld_device": "{name}_cpld"{sw}{pll_vco}{sync_delay_seed}{io_update_delay} }} }}""", name=urukul_name, @@ -201,6 +201,7 @@ class PeripheralManager: uchn=i, sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "", pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "", + pll_n=peripheral.get("pll_n", 32), sync_delay_seed=",\n \"sync_delay_seed\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "", io_update_delay=",\n \"io_update_delay\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "") elif dds == "ad9912": @@ -210,16 +211,17 @@ class PeripheralManager: "module": "artiq.coredevice.ad9912", "class": "AD9912", "arguments": {{ - "pll_n": 8, + "pll_n": {pll_n}, "chip_select": {chip_select}, - "cpld_device": "{name}_cpld", - "sw_device": "ttl_{name}_sw{uchn}"{pll_vco} + "cpld_device": "{name}_cpld"{sw}{pll_vco} }} }}""", name=urukul_name, chip_select=4 + i, uchn=i, - pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "") + sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "", + pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "", + pll_n=peripheral.get("pll_n", 8)) else: raise ValueError return next(channel)