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artiq
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conda: bump migen, misoc 

* xilinx ODDR2 SRTYPE
* flterm leak
* I/ODELAY VTC/reset sequencing
* sayma SDRAM clock buffer LOC
This commit is contained in:
Robert Jördens 2018-03-19 19:57:00 +01:00
parent 4b3f408143
commit 65379b1f7a
1 changed files with 2 additions and 2 deletions
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conda/artiq-dev/meta.yaml
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@ -14,8 +14,8 @@ requirements:
run:
- python >=3.5.3,<3.6
- setuptools 33.1.1
- migen 0.7 py35_20+git1f82faa
- misoc 0.10 py35_0+gitd167deff
- migen 0.7 py35_21+git881741b
- misoc 0.10 py35_9+git103bb3a8
- jesd204b 0.5
- microscope
- binutils-or1k-linux >=2.27