diff --git a/artiq/coredevice/rtio.py b/artiq/coredevice/rtio.py
index f4d0e2c82..de9954fc1 100644
--- a/artiq/coredevice/rtio.py
+++ b/artiq/coredevice/rtio.py
@@ -1,5 +1,5 @@
 from artiq.language.core import syscall
-from artiq.language.types import TInt64, TInt32, TNone
+from artiq.language.types import TInt64, TInt32, TNone, TList
 
 
 @syscall(flags={"nowrite"})
@@ -8,6 +8,12 @@ def rtio_output(time_mu: TInt64, channel: TInt32, addr: TInt32, data: TInt32
     raise NotImplementedError("syscall not simulated")
 
 
+@syscall(flags={"nowrite"})
+def rtio_output_list(time_mu: TInt64, channel: TInt32, addr: TInt32,
+                     data: TList(TInt32)) -> TNone:
+    raise NotImplementedError("syscall not simulated")
+
+
 @syscall(flags={"nowrite"})
 def rtio_input_timestamp(timeout_mu: TInt64, channel: TInt32) -> TInt64:
     raise NotImplementedError("syscall not simulated")
diff --git a/artiq/runtime/rtio.c b/artiq/runtime/rtio.c
index ac5168224..9dd47212e 100644
--- a/artiq/runtime/rtio.c
+++ b/artiq/runtime/rtio.c
@@ -58,7 +58,27 @@ void rtio_output(long long int timestamp, int channel, unsigned int addr,
 #ifdef CSR_RTIO_O_ADDRESS_ADDR
     rtio_o_address_write(addr);
 #endif
-    rtio_o_data_write(data);
+    MMPTR(CSR_RTIO_O_DATA_ADDR) = data;
+    rtio_o_we_write(1);
+    status = rtio_o_status_read();
+    if(status)
+        rtio_process_exceptional_status(timestamp, channel, status);
+}
+
+
+void rtio_output_list(long long int timestamp, int channel,
+        unsigned int addr, struct artiq_list data)
+{
+    int status, i;
+    volatile unsigned int *p = &MMPTR(CSR_RTIO_O_DATA_ADDR);
+
+    rtio_chan_sel_write(channel);
+    rtio_o_timestamp_write(timestamp);
+#ifdef CSR_RTIO_O_ADDRESS_ADDR
+    rtio_o_address_write(addr);
+#endif
+    for(i=0;i<data.length;i++)
+        *p++ = *data.elements++;
     rtio_o_we_write(1);
     status = rtio_o_status_read();
     if(status)
@@ -116,7 +136,7 @@ unsigned int rtio_input_data(int channel)
         }
     }
 
-    data = rtio_i_data_read();
+    data = MMPTR(CSR_RTIO_I_DATA_ADDR);
     rtio_i_re_write(1);
     return data;
 }
@@ -140,14 +160,14 @@ void rtio_log_va(long long int timestamp, const char *fmt, va_list args)
         word <<= 8;
         word |= *buf & 0xff;
         if(*buf == 0) {
-            rtio_o_data_write(word);
+            MMPTR(CSR_RTIO_O_DATA_ADDR) = word;
             rtio_o_we_write(1);
             break;
         }
         buf++;
         i++;
         if(i == 4) {
-            rtio_o_data_write(word);
+            MMPTR(CSR_RTIO_O_DATA_ADDR) = word;
             rtio_o_we_write(1);
             word = 0;
             i = 0;
diff --git a/artiq/runtime/rtio.h b/artiq/runtime/rtio.h
index aad6460ba..0d5b5ad59 100644
--- a/artiq/runtime/rtio.h
+++ b/artiq/runtime/rtio.h
@@ -11,12 +11,21 @@
 #define RTIO_I_STATUS_EMPTY 1
 #define RTIO_I_STATUS_OVERFLOW 2
 
+
+struct artiq_list {
+    int32_t length;
+    int32_t *elements;
+};
+
+
 void rtio_init(void);
 long long int rtio_get_counter(void);
 void rtio_log(long long int timestamp, const char *format, ...);
 void rtio_log_va(long long int timestamp, const char *format, va_list args);
 void rtio_output(long long int timestamp, int channel, unsigned int address,
         unsigned int data);
+void rtio_output_list(long long int timestamp, int channel,
+        unsigned int addr, struct artiq_list data);
 
 /*
  * Waits at least until timeout and returns the timestamp of the first