diff --git a/artiq/devices/dds_core.py b/artiq/devices/dds_core.py
index d380f2edf..8c0c66180 100644
--- a/artiq/devices/dds_core.py
+++ b/artiq/devices/dds_core.py
@@ -13,8 +13,7 @@ class DDS(AutoContext):
 	def pulse(self, frequency, duration):
 		if self._previous_frequency != frequency:
 			syscall("rtio_sync", self.rtio_channel) # wait until output is off
-			syscall("dds_program", self.reg_channel,
-				(frequency << 2)//(self.dds_sysclk >> 15) << 15)
+			syscall("dds_program", self.reg_channel, int(2**32*frequency/self.dds_sysclk))
 			self._previous_frequency = frequency
 		syscall("rtio_set", now(), self.rtio_channel, 1)
 		delay(duration)