mirror of https://github.com/m-labs/artiq.git
sayma_rtm: use bitstream opts in migen
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@ -81,12 +81,6 @@ CSR_RANGE_SIZE = 0x800
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class SaymaRTM(Module):
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def __init__(self, platform):
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platform.toolchain.bitstream_commands.extend([
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"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
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"set_property CFGBVS VCCO [current_design]",
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"set_property CONFIG_VOLTAGE 3.3 [current_design]",
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])
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csr_devices = []
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self.submodules.crg = CRG(platform)
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@ -14,7 +14,7 @@ requirements:
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run:
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- python >=3.5.3,<3.6
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- setuptools 33.1.1
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- migen 0.7 py35_26+git4039322
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- migen 0.7 py35_30+git5c2c144
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- misoc 0.11 py35_7+git269b6502
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- jesd204b 0.5
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- microscope
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