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runtime: fix metlino si5324 init (2)
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@ -163,6 +163,8 @@ pub fn init() {
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let si5324_ext_input = si5324::Input::Ckin1;
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let si5324_ext_input = si5324::Input::Ckin1;
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#[cfg(all(soc_platform = "kasli", not(hw_rev = "v2.0")))]
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#[cfg(all(soc_platform = "kasli", not(hw_rev = "v2.0")))]
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let si5324_ext_input = si5324::Input::Ckin2;
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let si5324_ext_input = si5324::Input::Ckin2;
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#[cfg(soc_platform = "metlino")]
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let si5324_ext_input = si5324::Input::Ckin2;
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match get_rtio_clock_cfg() {
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match get_rtio_clock_cfg() {
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RtioClock::Internal => setup_si5324_as_synthesizer(),
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RtioClock::Internal => setup_si5324_as_synthesizer(),
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RtioClock::External => si5324::bypass(si5324_ext_input).expect("cannot bypass Si5324")
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RtioClock::External => si5324::bypass(si5324_ext_input).expect("cannot bypass Si5324")
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