From 56d4b70e01067befddbcd57c5eae07f1f32c6c57 Mon Sep 17 00:00:00 2001 From: gthickman Date: Mon, 18 Nov 2019 08:57:27 -0600 Subject: [PATCH] ad9910 osk (#1387) * updated adoo10.py for RAM mode frequency control * updated docstrings for set_cfr1() in ad9910.py * fixed typo in ad9910.py * added docstrings to ad9910.py * removed OSK-related changes in AD9910, to be included in a separate branch. * updated AD9910 set_cfr1 for control of OSK mode parameters * updated AD9910 set_cfr1() for control of OSK mode parameters. --- artiq/coredevice/ad9910.py | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py index 9982dbf06..a28d87d0a 100644 --- a/artiq/coredevice/ad9910.py +++ b/artiq/coredevice/ad9910.py @@ -345,7 +345,8 @@ class AD9910: @kernel def set_cfr1(self, power_down=0b0000, phase_autoclear=0, drg_load_lrr=0, drg_autoclear=0, - internal_profile=0, ram_destination=0, ram_enable=0): + internal_profile=0, ram_destination=0, ram_enable=0, + manual_osk_external=0, osk_enable=0, select_auto_osk=0): """Set CFR1. See the AD9910 datasheet for parameter meanings. This method does not pulse IO_UPDATE. @@ -359,14 +360,20 @@ class AD9910: (:const:`RAM_DEST_FTW`, :const:`RAM_DEST_POW`, :const:`RAM_DEST_ASF`, :const:`RAM_DEST_POWASF`). :param ram_enable: RAM mode enable. + :param manual_osk_external: Enable OSK pin control in manual OSK mode. + :param osk_enable: Enable OSK mode. + :param select_auto_osk: Select manual or automatic OSK mode. """ self.write32(_AD9910_REG_CFR1, (ram_enable << 31) | (ram_destination << 29) | + (manual_osk_external << 23) | (internal_profile << 17) | (drg_load_lrr << 15) | (drg_autoclear << 14) | (phase_autoclear << 13) | + (osk_enable << 9) | + (select_auto_osk << 8) | (power_down << 4) | 2) # SDIO input only, MSB first