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eem: finalize grabber support
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parent
2612fd1e72
commit
563e434e15
@ -3,7 +3,7 @@ from migen.build.generic_platform import *
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from migen.genlib.io import DifferentialOutput
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from migen.genlib.io import DifferentialOutput
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from artiq.gateware import rtio
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from artiq.gateware import rtio
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from artiq.gateware.rtio.phy import spi2
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from artiq.gateware.rtio.phy import spi2, grabber
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def _eem_signal(i):
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def _eem_signal(i):
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@ -354,16 +354,10 @@ class Grabber(_EEM):
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def io(eem, eem_aux):
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def io(eem, eem_aux):
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ios = [
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ios = [
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("grabber{}_video".format(eem), 0,
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("grabber{}_video".format(eem), 0,
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Subsignal("xclk_p", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("clk_p", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("xclk_n", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("clk_n", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("x0_p", Pins(_eem_pin(eem, 1, "p"))),
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Subsignal("sdi_p", Pins(*[_eem_pin(eem, i, "p") for i in range(1, 5)])),
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Subsignal("x0_n", Pins(_eem_pin(eem, 1, "n"))),
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Subsignal("sdi_n", Pins(*[_eem_pin(eem, i, "n") for i in range(1, 5)])),
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Subsignal("x1_p", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("x1_n", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("x2_p", Pins(_eem_pin(eem, 3, "p"))),
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Subsignal("x2_n", Pins(_eem_pin(eem, 3, "n"))),
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Subsignal("x3_p", Pins(_eem_pin(eem, 4, "p"))),
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Subsignal("x3_n", Pins(_eem_pin(eem, 4, "n"))),
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IOStandard("LVDS_25")
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IOStandard("LVDS_25")
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),
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),
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("grabber{}_cc0".format(eem), 0,
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("grabber{}_cc0".format(eem), 0,
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@ -385,16 +379,10 @@ class Grabber(_EEM):
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if eem_aux is not None:
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if eem_aux is not None:
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ios += [
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ios += [
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("grabber{}_video_m".format(eem), 0,
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("grabber{}_video_m".format(eem), 0,
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Subsignal("yclk_p", Pins(_eem_pin(eem_aux, 0, "p"))),
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Subsignal("clk_p", Pins(_eem_pin(eem_aux, 0, "p"))),
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Subsignal("yclk_n", Pins(_eem_pin(eem_aux, 0, "n"))),
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Subsignal("clk_n", Pins(_eem_pin(eem_aux, 0, "n"))),
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Subsignal("y0_p", Pins(_eem_pin(eem_aux, 1, "p"))),
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Subsignal("sdi_p", Pins(*[_eem_pin(eem_aux, i, "p") for i in range(1, 5)])),
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Subsignal("y0_n", Pins(_eem_pin(eem_aux, 1, "n"))),
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Subsignal("sdi_n", Pins(*[_eem_pin(eem_aux, i, "n") for i in range(1, 5)])),
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Subsignal("y1_p", Pins(_eem_pin(eem_aux, 2, "p"))),
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Subsignal("y1_n", Pins(_eem_pin(eem_aux, 2, "n"))),
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Subsignal("y2_p", Pins(_eem_pin(eem_aux, 3, "p"))),
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Subsignal("y2_n", Pins(_eem_pin(eem_aux, 3, "n"))),
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Subsignal("y3_p", Pins(_eem_pin(eem_aux, 4, "p"))),
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Subsignal("y3_n", Pins(_eem_pin(eem_aux, 4, "n"))),
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IOStandard("LVDS_25")
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IOStandard("LVDS_25")
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),
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),
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("grabber{}_serrx".format(eem), 0,
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("grabber{}_serrx".format(eem), 0,
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@ -416,16 +404,28 @@ class Grabber(_EEM):
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return ios
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return ios
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@classmethod
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls):
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def add_std(cls, target, eem, eem_aux=None, ttl_out_cls=None):
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cls.add_extension(target, eem, eem_aux)
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cls.add_extension(target, eem, eem_aux)
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for signal in "cc0 cc1 cc2".split():
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phy = grabber.Grabber(target.platform.request(
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pads = target.platform.request("grabber{}_{}".format(eem, signal))
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"grabber{}_video".format(eem)))
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phy = ttl_out_cls(pads.p, pads.n)
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name = "grabber{}".format(len(target.grabber_csr_group))
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target.submodules += phy
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setattr(target.submodules, name, phy)
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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target.grabber_csr_group.append(name)
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if eem_aux is not None:
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target.csr_devices.append(name)
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pads = target.platform.request("grabber{}_cc3".format(eem))
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target.rtio_channels += [
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phy = ttl_out_cls(pads.p, pads.n)
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rtio.Channel(phy.config),
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target.submodules += phy
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rtio.Channel(phy.gate_data)
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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]
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if ttl_out_cls is not None:
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for signal in "cc0 cc1 cc2".split():
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pads = target.platform.request("grabber{}_{}".format(eem, signal))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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if eem_aux is not None:
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pads = target.platform.request("grabber{}_cc3".format(eem))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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