mirror of https://github.com/m-labs/artiq.git
suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins Signed-off-by: Robert Jördens <rj@quartiq.de>
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86e1924493
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56074cfffa
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@ -470,13 +470,15 @@ class Grabber(_EEM):
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class SUServo(_EEM):
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class SUServo(_EEM):
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@staticmethod
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@staticmethod
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def io(*eems, iostandard="LVDS_25"):
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def io(*eems, iostandard="LVDS_25"):
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assert len(eems) == 6
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assert len(eems) in (4, 6)
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return (Sampler.io(*eems[0:2], iostandard=iostandard)
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io = (Sampler.io(*eems[0:2], iostandard=iostandard)
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+ Urukul.io_qspi(*eems[2:4], iostandard=iostandard)
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+ Urukul.io_qspi(*eems[2:4], iostandard=iostandard))
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+ Urukul.io_qspi(*eems[4:6], iostandard=iostandard))
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if len(eems) == 6: # two Urukuls
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io += Urukul.io_qspi(*eems[4:6], iostandard=iostandard),
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return io
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@classmethod
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@classmethod
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def add_std(cls, target, eems_sampler, eems_urukul0, eems_urukul1,
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def add_std(cls, target, eems_sampler, eems_urukul,
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t_rtt=4, clk=1, shift=11, profile=5,
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t_rtt=4, clk=1, shift=11, profile=5,
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iostandard="LVDS_25"):
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iostandard="LVDS_25"):
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"""Add a 8-channel Sampler-Urukul Servo
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"""Add a 8-channel Sampler-Urukul Servo
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@ -496,15 +498,14 @@ class SUServo(_EEM):
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(default: 5)
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(default: 5)
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"""
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"""
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cls.add_extension(
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cls.add_extension(
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target, *(eems_sampler + eems_urukul0 + eems_urukul1),
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target, *(eems_sampler + sum(eems_urukul, [])),
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iostandard=iostandard)
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iostandard=iostandard)
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eem_sampler = "sampler{}".format(eems_sampler[0])
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eem_sampler = "sampler{}".format(eems_sampler[0])
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eem_urukul0 = "urukul{}".format(eems_urukul0[0])
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eem_urukul = ["urukul{}".format(i[0]) for i in eems_urukul]
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eem_urukul1 = "urukul{}".format(eems_urukul1[0])
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sampler_pads = servo_pads.SamplerPads(target.platform, eem_sampler)
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sampler_pads = servo_pads.SamplerPads(target.platform, eem_sampler)
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urukul_pads = servo_pads.UrukulPads(
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urukul_pads = servo_pads.UrukulPads(
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target.platform, eem_urukul0, eem_urukul1)
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target.platform, *eem_urukul)
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target.submodules += sampler_pads, urukul_pads
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target.submodules += sampler_pads, urukul_pads
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# timings in units of RTIO coarse period
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# timings in units of RTIO coarse period
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adc_p = servo.ADCParams(width=16, channels=8, lanes=4, t_cnvh=4,
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adc_p = servo.ADCParams(width=16, channels=8, lanes=4, t_cnvh=4,
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@ -536,30 +537,24 @@ class SUServo(_EEM):
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target.submodules += phy
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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phy = spi2.SPIMaster(
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for i in range(2):
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target.platform.request("{}_spi_p".format(eem_urukul0)),
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if len(eem_urukul) > i:
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target.platform.request("{}_spi_n".format(eem_urukul0)))
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spi_p, spi_n = (
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target.platform.request("{}_spi_p".format(eem_urukul[i])),
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target.platform.request("{}_spi_n".format(eem_urukul[i])))
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else: # create a dummy bus
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spi_p = Record([("clk", 1), ("cs_n", 1)]) # mosi, cs_n
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spi_n = None
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phy = spi2.SPIMaster(spi_p, spi_n)
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target.submodules += phy
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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pads = target.platform.request("{}_dds_reset_sync_in".format(eem_urukul0))
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for j, eem_urukuli in enumerate(eem_urukul):
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pads = target.platform.request("{}_dds_reset_sync_in".format(eem_urukuli))
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target.specials += DifferentialOutput(0, pads.p, pads.n)
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target.specials += DifferentialOutput(0, pads.p, pads.n)
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for i, signal in enumerate("sw0 sw1 sw2 sw3".split()):
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for i, signal in enumerate("sw0 sw1 sw2 sw3".split()):
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pads = target.platform.request("{}_{}".format(eem_urukul0, signal))
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pads = target.platform.request("{}_{}".format(eem_urukuli, signal))
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target.specials += DifferentialOutput(
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target.specials += DifferentialOutput(
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su.iir.ctrl[i].en_out, pads.p, pads.n)
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su.iir.ctrl[j*4 + i].en_out, pads.p, pads.n)
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phy = spi2.SPIMaster(
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target.platform.request("{}_spi_p".format(eem_urukul1)),
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target.platform.request("{}_spi_n".format(eem_urukul1)))
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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pads = target.platform.request("{}_dds_reset_sync_in".format(eem_urukul1))
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target.specials += DifferentialOutput(0, pads.p, pads.n)
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for i, signal in enumerate("sw0 sw1 sw2 sw3".split()):
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pads = target.platform.request("{}_{}".format(eem_urukul1, signal))
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target.specials += DifferentialOutput(
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su.iir.ctrl[i + 4].en_out, pads.p, pads.n)
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@ -58,12 +58,12 @@ class SamplerPads(Module):
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class UrukulPads(Module):
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class UrukulPads(Module):
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def __init__(self, platform, eem0, eem1):
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def __init__(self, platform, *eems):
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spip, spin = [[
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spip, spin = [[
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platform.request("{}_qspi_{}".format(eem, pol), 0)
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platform.request("{}_qspi_{}".format(eem, pol), 0)
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for eem in (eem0, eem1)] for pol in "pn"]
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for eem in eems] for pol in "pn"]
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ioup = [platform.request("{}_io_update".format(eem), 0)
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ioup = [platform.request("{}_io_update".format(eem), 0)
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for eem in (eem0, eem1)]
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for eem in eems]
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self.cs_n = Signal()
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self.cs_n = Signal()
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self.clk = Signal()
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self.clk = Signal()
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self.io_update = Signal()
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self.io_update = Signal()
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@ -71,12 +71,13 @@ class UrukulPads(Module):
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DifferentialOutput(~self.cs_n, spip[i].cs, spin[i].cs),
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DifferentialOutput(~self.cs_n, spip[i].cs, spin[i].cs),
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DifferentialOutput(self.clk, spip[i].clk, spin[i].clk),
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DifferentialOutput(self.clk, spip[i].clk, spin[i].clk),
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DifferentialOutput(self.io_update, ioup[i].p, ioup[i].n))
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DifferentialOutput(self.io_update, ioup[i].p, ioup[i].n))
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for i in range(2)]
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for i in range(len(eems))]
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for i in range(8):
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for i in range(8):
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mosi = Signal()
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mosi = Signal()
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setattr(self, "mosi{}".format(i), mosi)
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setattr(self, "mosi{}".format(i), mosi)
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for i in range(4*len(eems)):
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self.specials += [
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self.specials += [
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DifferentialOutput(mosi,
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DifferentialOutput(getattr(self, "mosi{}".format(i)),
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getattr(spip[i // 4], "mosi{}".format(i % 4)),
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getattr(spip[i // 4], "mosi{}".format(i % 4)),
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getattr(spin[i // 4], "mosi{}".format(i % 4)))
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getattr(spin[i // 4], "mosi{}".format(i % 4)))
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]
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]
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@ -64,13 +64,17 @@ def peripheral_sampler(module, peripheral):
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def peripheral_suservo(module, peripheral):
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def peripheral_suservo(module, peripheral):
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if len(peripheral["sampler_ports"]) != 2:
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if len(peripheral["sampler_ports"]) != 2:
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raise ValueError("wrong number of Sampler ports")
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raise ValueError("wrong number of Sampler ports")
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urukul_ports = []
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if len(peripheral["urukul0_ports"]) != 2:
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if len(peripheral["urukul0_ports"]) != 2:
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raise ValueError("wrong number of Urukul #0 ports")
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raise ValueError("wrong number of Urukul #0 ports")
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urukul_ports.append(peripheral["urukul0_ports"])
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if "urukul1_ports" in peripheral:
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if len(peripheral["urukul1_ports"]) != 2:
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if len(peripheral["urukul1_ports"]) != 2:
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raise ValueError("wrong number of Urukul #1 ports")
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raise ValueError("wrong number of Urukul #1 ports")
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urukul_ports.append(peripheral["urukul1_ports"])
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eem.SUServo.add_std(module,
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eem.SUServo.add_std(module,
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peripheral["sampler_ports"],
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peripheral["sampler_ports"],
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peripheral["urukul0_ports"], peripheral["urukul1_ports"])
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urukul_ports)
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def peripheral_zotino(module, peripheral):
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def peripheral_zotino(module, peripheral):
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