mirror of https://github.com/m-labs/artiq.git
dyld: check ABI
This commit is contained in:
parent
0f660735bf
commit
531670d6c5
|
@ -2230,6 +2230,12 @@ pub const R_OR1K_TLS_TPOFF: u8 = 32;
|
||||||
pub const R_OR1K_TLS_DTPOFF: u8 = 33;
|
pub const R_OR1K_TLS_DTPOFF: u8 = 33;
|
||||||
pub const R_OR1K_TLS_DTPMOD: u8 = 34;
|
pub const R_OR1K_TLS_DTPMOD: u8 = 34;
|
||||||
pub const R_OR1K_NUM: u8 = 35;
|
pub const R_OR1K_NUM: u8 = 35;
|
||||||
|
pub const EF_RISCV_RVC: u32 = 1;
|
||||||
|
pub const EF_RISCV_FLOAT_ABI: u32 = 6;
|
||||||
|
pub const EF_RISCV_FLOAT_ABI_SOFT: u32 = 0;
|
||||||
|
pub const EF_RISCV_FLOAT_ABI_SINGLE: u32 = 2;
|
||||||
|
pub const EF_RISCV_FLOAT_ABI_DOUBLE: u32 = 4;
|
||||||
|
pub const EF_RISCV_FLOAT_ABI_QUAD: u32 = 6;
|
||||||
pub const R_RISCV_NONE: u8 = 0;
|
pub const R_RISCV_NONE: u8 = 0;
|
||||||
pub const R_RISCV_32: u8 = 1;
|
pub const R_RISCV_32: u8 = 1;
|
||||||
pub const R_RISCV_64: u8 = 2;
|
pub const R_RISCV_64: u8 = 2;
|
||||||
|
|
|
@ -219,7 +219,13 @@ impl<'a> Library<'a> {
|
||||||
#[cfg(not(target_arch = "riscv32"))]
|
#[cfg(not(target_arch = "riscv32"))]
|
||||||
const ARCH: u16 = EM_NONE;
|
const ARCH: u16 = EM_NONE;
|
||||||
|
|
||||||
if ehdr.e_ident != IDENT || ehdr.e_type != ET_DYN || ehdr.e_machine != ARCH {
|
#[cfg(all(target_feature = "f", target_feature = "d"))]
|
||||||
|
const FLAGS: u32 = EF_RISCV_FLOAT_ABI_DOUBLE;
|
||||||
|
|
||||||
|
#[cfg(not(all(target_feature = "f", target_feature = "d")))]
|
||||||
|
const FLAGS: u32 = EF_RISCV_FLOAT_ABI_SOFT;
|
||||||
|
|
||||||
|
if ehdr.e_ident != IDENT || ehdr.e_type != ET_DYN || ehdr.e_machine != ARCH || ehdr.e_flags != FLAGS {
|
||||||
return Err("not a shared library for current architecture")?
|
return Err("not a shared library for current architecture")?
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue