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analyzer: adapt to TSC changes
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parent
15b16695c6
commit
4e4398afa6
@ -43,7 +43,7 @@ assert layout_len(stopped_layout) == message_len
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class MessageEncoder(Module, AutoCSR):
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def __init__(self, cri, enable):
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def __init__(self, tsc, cri, enable):
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self.source = stream.Endpoint([("data", message_len)])
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self.overflow = CSRStatus()
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@ -67,7 +67,7 @@ class MessageEncoder(Module, AutoCSR):
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self.comb += [
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input_output.channel.eq(cri.chan_sel),
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input_output.address_padding.eq(cri.o_address),
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input_output.rtio_counter.eq(cri.counter),
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input_output.rtio_counter.eq(tsc.full_ts_cri),
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If(cri.cmd == cri_commands["write"],
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input_output.message_type.eq(MessageType.output.value),
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input_output.timestamp.eq(cri.timestamp),
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@ -85,7 +85,7 @@ class MessageEncoder(Module, AutoCSR):
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self.comb += [
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exception.message_type.eq(MessageType.exception.value),
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exception.channel.eq(cri.chan_sel),
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exception.rtio_counter.eq(cri.counter),
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exception.rtio_counter.eq(tsc.full_ts_cri),
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]
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just_written = Signal()
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self.sync += just_written.eq(cri.cmd == cri_commands["write"])
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@ -103,7 +103,7 @@ class MessageEncoder(Module, AutoCSR):
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stopped = Record(stopped_layout)
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self.comb += [
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stopped.message_type.eq(MessageType.stopped.value),
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stopped.rtio_counter.eq(cri.counter),
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stopped.rtio_counter.eq(tsc.full_ts_cri),
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]
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enable_r = Signal()
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@ -193,13 +193,13 @@ class DMAWriter(Module, AutoCSR):
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class Analyzer(Module, AutoCSR):
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def __init__(self, cri, membus, fifo_depth=128):
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def __init__(self, tsc, cri, membus, fifo_depth=128):
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# shutdown procedure: set enable to 0, wait until busy=0
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self.enable = CSRStorage()
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self.busy = CSRStatus()
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self.submodules.message_encoder = MessageEncoder(
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cri, self.enable.storage)
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tsc, cri, self.enable.storage)
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self.submodules.fifo = stream.SyncFIFO(
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[("data", message_len)], fifo_depth, True)
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self.submodules.converter = stream.Converter(
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