test: relax test_rtio.test_loopback

With SED there are 8 additional FIFO output stages.
2017-09-26 17:13:02 +08:00 · 2017-09-26 17:13:02 +08:00 · 4e31e9a9ac
parent 73043c3464
commit 4e31e9a9ac
1 changed files with 1 additions and 1 deletions
--- a/artiq/test/coredevice/test_rtio.py
+++ b/artiq/test/coredevice/test_rtio.py
@ -362,7 +362,7 @@ class CoredeviceTest(ExperimentCase):
        rtt = self.dataset_mgr.get("rtt")
        print(rtt)
        self.assertGreater(rtt, 0*ns)
-        self.assertLess(rtt, 60*ns)
+        self.assertLess(rtt, 124*ns)

    def test_clock_generator_loopback(self):
        self.execute(ClockGeneratorLoopback)