From 4dfe71676efd8e19cf113f51752732b6cf200d92 Mon Sep 17 00:00:00 2001 From: whitequark Date: Thu, 28 Dec 2017 02:20:08 +0000 Subject: [PATCH] firmware: remove dependency on libbase. --- artiq/firmware/Cargo.lock | 14 ++ artiq/firmware/ksupport/Cargo.toml | 1 + artiq/firmware/ksupport/Makefile | 4 +- artiq/firmware/ksupport/glue.c | 2 + artiq/firmware/ksupport/ksupport.ld | 37 +-- artiq/firmware/ksupport/lib.rs | 10 +- artiq/firmware/libboard/Cargo.toml | 1 + artiq/firmware/libboard/boot.rs | 6 +- artiq/firmware/libboard/build.rs | 9 + artiq/firmware/libboard/lib.rs | 1 + artiq/firmware/libboard/vectors.S | 374 ++++++++++++++++++++++++++++ artiq/firmware/runtime/Makefile | 2 +- artiq/firmware/runtime/lib.rs | 2 +- artiq/firmware/runtime/runtime.ld | 41 +-- 14 files changed, 437 insertions(+), 67 deletions(-) create mode 100644 artiq/firmware/libboard/vectors.S diff --git a/artiq/firmware/Cargo.lock b/artiq/firmware/Cargo.lock index 36a5db4e9..f6d660460 100644 --- a/artiq/firmware/Cargo.lock +++ b/artiq/firmware/Cargo.lock @@ -29,6 +29,7 @@ dependencies = [ "bitflags 1.0.1 (registry+https://github.com/rust-lang/crates.io-index)", "build_artiq 0.0.0", "byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)", + "cc 1.0.3 (registry+https://github.com/rust-lang/crates.io-index)", "log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)", ] @@ -44,6 +45,11 @@ name = "byteorder" version = "1.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" +[[package]] +name = "cc" +version = "1.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" + [[package]] name = "compiler_builtins" version = "0.1.0" @@ -106,6 +112,7 @@ dependencies = [ "cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)", "dyld 0.0.0", "proto 0.0.0", + "rlibc 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)", "std_artiq 0.0.0", ] @@ -149,6 +156,11 @@ dependencies = [ "std_artiq 0.0.0", ] +[[package]] +name = "rlibc" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" + [[package]] name = "runtime" version = "0.0.0" @@ -235,6 +247,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" [metadata] "checksum bitflags 1.0.1 (registry+https://github.com/rust-lang/crates.io-index)" = "b3c30d3802dfb7281680d6285f2ccdaa8c2d8fee41f93805dba5c4cf50dc23cf" "checksum byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "652805b7e73fada9d85e9a6682a4abd490cb52d96aeecc12e33a0de34dfd0d23" +"checksum cc 1.0.3 (registry+https://github.com/rust-lang/crates.io-index)" = "a9b13a57efd6b30ecd6598ebdb302cca617930b5470647570468a65d12ef9719" "checksum compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568)" = "" "checksum cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0f8cb7306107e4b10e64994de6d3274bd08996a7c1322a27b86482392f96be0a" "checksum fringe 1.1.0 (git+https://github.com/m-labs/libfringe?rev=bd23494)" = "" @@ -244,6 +257,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" "checksum log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)" = "880f77541efa6e5cc74e76910c9884d9859683118839d6a1dc3b11e63512565b" "checksum log_buffer 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "ec57723b84bbe7bdf76aa93169c9b59e67473317c6de3a83cb2a0f8ccb2aa493" "checksum managed 0.4.0 (git+https://github.com/m-labs/rust-managed.git?rev=629a6786a1cf1692015f464ed16c04eafa5cb8d1)" = "" +"checksum rlibc 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)" = "fc874b127765f014d792f16763a81245ab80500e2ad921ed4ee9e82481ee08fe" "checksum rustc-cfg 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = "56a596b5718bf5e059d59a30af12f7f462a152de147aa462b70892849ee18704" "checksum same-file 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)" = "d931a44fdaa43b8637009e7632a02adc4f2b2e0733c08caa4cf00e8da4a117a7" "checksum smoltcp 0.4.0 (git+https://github.com/m-labs/smoltcp?rev=507d2fe)" = "" diff --git a/artiq/firmware/ksupport/Cargo.toml b/artiq/firmware/ksupport/Cargo.toml index c785d0aa3..d808e4af7 100644 --- a/artiq/firmware/ksupport/Cargo.toml +++ b/artiq/firmware/ksupport/Cargo.toml @@ -13,6 +13,7 @@ crate-type = ["staticlib"] build_artiq = { path = "../libbuild_artiq" } [dependencies] +rlibc = "1.0" byteorder = { version = "1.0", default-features = false } cslice = { version = "0.3" } alloc_stub = { path = "../liballoc_stub" } diff --git a/artiq/firmware/ksupport/Makefile b/artiq/firmware/ksupport/Makefile index ff93ec31f..b2ad9410c 100644 --- a/artiq/firmware/ksupport/Makefile +++ b/artiq/firmware/ksupport/Makefile @@ -8,8 +8,8 @@ CFLAGS += \ LDFLAGS += --eh-frame-hdr \ -L../libcompiler-rt \ - -L../libbase \ -L../libm \ + -L../libprintf \ -L../libunwind RUSTFLAGS += -Cpanic=unwind @@ -22,7 +22,7 @@ $(RUSTOUT)/libksupport.a: ksupport.elf: $(RUSTOUT)/libksupport.a glue.o $(link) -T $(KSUPPORT_DIRECTORY)/ksupport.ld \ - -lunwind-elf -lcompiler-rt -lbase -lm + -lunwind-elf -lprintf-float -lm -lcompiler-rt %.o: $(KSUPPORT_DIRECTORY)/%.c $(compile) diff --git a/artiq/firmware/ksupport/glue.c b/artiq/firmware/ksupport/glue.c index 475e22a84..4e4ce318d 100644 --- a/artiq/firmware/ksupport/glue.c +++ b/artiq/firmware/ksupport/glue.c @@ -19,6 +19,8 @@ void send_to_rtio_log(long long int timestamp, struct slice data); #define KERNELCPU_LAST_ADDRESS 0x4fffffff #define KSUPPORT_HEADER_SIZE 0x80 +FILE *stderr; + /* called by libunwind */ int fprintf(FILE *stream, const char *fmt, ...) { diff --git a/artiq/firmware/ksupport/ksupport.ld b/artiq/firmware/ksupport/ksupport.ld index 333db0739..48b6978f2 100644 --- a/artiq/firmware/ksupport/ksupport.ld +++ b/artiq/firmware/ksupport/ksupport.ld @@ -1,8 +1,6 @@ INCLUDE generated/output_format.ld -STARTUP(crt0-or1k.o) -ENTRY(_start) - INCLUDE generated/regions.ld +ENTRY(_reset_handler) /* First 4M of main memory are reserved for runtime * code/data/heap, then comes kernel memory. @@ -17,7 +15,7 @@ MEMORY { } /* Kernel stack is at the end of main RAM. */ -PROVIDE(_fstack = ORIGIN(main_ram) + LENGTH(main_ram) - 4); +_fstack = ORIGIN(main_ram) + LENGTH(main_ram) - 4; /* Force ld to make the ELF header as loadable. */ PHDRS @@ -28,16 +26,18 @@ PHDRS SECTIONS { + .vectors : { + *(.vectors) + } :text + .text : { - _ftext = .; - *(.text .stub .text.* .gnu.linkonce.t.*) - _etext = .; + *(.text .text.*) } :text /* https://sourceware.org/bugzilla/show_bug.cgi?id=20475 */ .got : { - _GLOBAL_OFFSET_TABLE_ = .; + PROVIDE(_GLOBAL_OFFSET_TABLE_ = .); *(.got) } :text @@ -47,11 +47,7 @@ SECTIONS .rodata : { - . = ALIGN(4); - _frodata = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - *(.rodata1) - _erodata = .; + *(.rodata .rodata.*) } > ksupport .eh_frame : @@ -66,24 +62,13 @@ SECTIONS .data : { - . = ALIGN(4); - _fdata = .; - *(.data .data.* .gnu.linkonce.d.*) - *(.data1) - *(.sdata .sdata.* .gnu.linkonce.s.*) - _edata = .; + *(.data .data.*) } .bss : { - . = ALIGN(4); _fbss = .; - *(.dynsbss) - *(.sbss .sbss.* .gnu.linkonce.sb.*) - *(.scommon) - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) + *(.bss .bss.*) . = ALIGN(4); _ebss = .; } diff --git a/artiq/firmware/ksupport/lib.rs b/artiq/firmware/ksupport/lib.rs index 29466daea..87b3cec4e 100644 --- a/artiq/firmware/ksupport/lib.rs +++ b/artiq/firmware/ksupport/lib.rs @@ -1,10 +1,11 @@ #![feature(lang_items, asm, libc, panic_unwind, unwind_attributes, global_allocator)] #![no_std] -extern crate unwind; -extern crate libc; +extern crate rlibc; extern crate byteorder; extern crate cslice; +extern crate unwind; +extern crate libc; extern crate alloc_stub; extern crate std_artiq as std; @@ -492,12 +493,11 @@ pub unsafe fn main() { } #[no_mangle] -pub extern fn exception_handler(vect: u32, _regs: *const u32, pc: u32, ea: u32) { +pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) { panic!("exception {:?} at PC 0x{:x}, EA 0x{:x}", vect, pc, ea) } -// We don't export this because libbase does. -// #[no_mangle] +#[no_mangle] pub extern fn abort() { panic!("aborted") } diff --git a/artiq/firmware/libboard/Cargo.toml b/artiq/firmware/libboard/Cargo.toml index c9eb425fc..f7dff2d1b 100644 --- a/artiq/firmware/libboard/Cargo.toml +++ b/artiq/firmware/libboard/Cargo.toml @@ -9,6 +9,7 @@ name = "board" path = "lib.rs" [build-dependencies] +cc = "1.0" build_artiq = { path = "../libbuild_artiq" } [dependencies] diff --git a/artiq/firmware/libboard/boot.rs b/artiq/firmware/libboard/boot.rs index bd54177a0..7e98257b0 100644 --- a/artiq/firmware/libboard/boot.rs +++ b/artiq/firmware/libboard/boot.rs @@ -4,7 +4,7 @@ pub unsafe fn reboot() -> ! { irq::set_ie(false); #[cfg(target_arch="or1k")] asm!(r#" - l.j _ftext + l.j _reset_handler l.nop "# : : : : "volatile"); loop {} @@ -16,8 +16,8 @@ pub unsafe fn hotswap(new_code: &[u8]) -> ! { asm!(r#" # This loop overwrites itself, but it's structured in such a way # that before that happens, it loads itself into I$$ fully. - l.movhi r4, hi(_ftext) - l.ori r4, r4, lo(_ftext) + l.movhi r4, hi(_reset_handler) + l.ori r4, r4, lo(_reset_handler) l.or r7, r4, r0 0: l.sfnei r5, 0 l.bf 1f diff --git a/artiq/firmware/libboard/build.rs b/artiq/firmware/libboard/build.rs index 03ad582f8..6090fad77 100644 --- a/artiq/firmware/libboard/build.rs +++ b/artiq/firmware/libboard/build.rs @@ -1,4 +1,5 @@ extern crate build_artiq; +extern crate cc; use std::env; use std::fs::File; @@ -6,6 +7,13 @@ use std::io::Write; use std::path::PathBuf; use std::process::Command; +fn build_vectors() { + println!("cargo:rerun-if-changed=vectors.S"); + cc::Build::new() + .file("vectors.S") + .compile("vectors"); +} + fn gen_hmc7043_writes() { println!("cargo:rerun-if-changed=hmc7043_gen_writes.py"); println!("cargo:rerun-if-changed=hmc7043_guiexport_6gbps.py"); @@ -25,5 +33,6 @@ fn gen_hmc7043_writes() { fn main() { build_artiq::misoc_cfg(); + build_vectors(); gen_hmc7043_writes(); } diff --git a/artiq/firmware/libboard/lib.rs b/artiq/firmware/libboard/lib.rs index b25e98837..8711cff3c 100644 --- a/artiq/firmware/libboard/lib.rs +++ b/artiq/firmware/libboard/lib.rs @@ -11,6 +11,7 @@ use core::{cmp, ptr, str}; include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs")); include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs")); +include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/sdram_phy.rs")); pub mod spr; pub mod irq; pub mod cache; diff --git a/artiq/firmware/libboard/vectors.S b/artiq/firmware/libboard/vectors.S new file mode 100644 index 000000000..a92f97a69 --- /dev/null +++ b/artiq/firmware/libboard/vectors.S @@ -0,0 +1,374 @@ +/* + * (C) Copyright 2012, Stefan Kristiansson + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +/* + * OR1K Architecture has a 128 byte "red zone" after the stack that can not be + * touched by exception handlers. GCC uses this red zone for locals and + * temps without needing to change the stack pointer. + */ +#define OR1K_RED_ZONE_SIZE 128 + +/* + * We need 4 bytes (32 bits) * 32 registers space on the stack to save all the + * registers. + */ +#define EXCEPTION_STACK_SIZE ((4*32) + OR1K_RED_ZONE_SIZE) + +#define HANDLE_EXCEPTION ; \ + l.addi r1, r1, -EXCEPTION_STACK_SIZE ; \ + l.sw 0x1c(r1), r9 ; \ + l.jal _exception_handler ; \ + l.nop ; \ + l.lwz r9, 0x1c(r1) ; \ + l.addi r1, r1, EXCEPTION_STACK_SIZE ; \ + l.rfe ; \ + l.nop + + +.section .vectors, "ax", @progbits +.global _reset_handler +_reset_handler: + l.movhi r0, 0 + l.movhi r1, 0 + l.movhi r2, 0 + l.movhi r3, 0 + l.movhi r4, 0 + l.movhi r5, 0 + l.movhi r6, 0 + l.movhi r7, 0 + l.movhi r8, 0 + l.movhi r9, 0 + l.movhi r10, 0 + l.movhi r11, 0 + l.movhi r12, 0 + l.movhi r13, 0 + l.movhi r14, 0 + l.movhi r15, 0 + l.movhi r16, 0 + l.movhi r17, 0 + l.movhi r18, 0 + l.movhi r19, 0 + l.movhi r20, 0 + l.movhi r21, 0 + l.movhi r22, 0 + l.movhi r23, 0 + l.movhi r24, 0 + l.movhi r25, 0 + l.movhi r26, 0 + l.movhi r27, 0 + l.movhi r28, 0 + l.movhi r29, 0 + l.movhi r30, 0 + l.movhi r31, 0 + + l.ori r21, r0, SPR_SR_SM + l.mtspr r0, r21, SPR_SR + l.movhi r21, hi(_reset_handler) + l.ori r21, r21, lo(_reset_handler) + l.mtspr r0, r21, SPR_EVBAR + /* enable caches */ + l.jal _cache_init + l.nop + l.j _crt0 + l.nop + + /* bus error */ + .org 0x200 + HANDLE_EXCEPTION + + /* data page fault */ + .org 0x300 + HANDLE_EXCEPTION + + /* instruction page fault */ + .org 0x400 + HANDLE_EXCEPTION + + /* tick timer */ + .org 0x500 + HANDLE_EXCEPTION + + /* alignment */ + .org 0x600 + HANDLE_EXCEPTION + + /* illegal instruction */ + .org 0x700 + HANDLE_EXCEPTION + + /* external interrupt */ + .org 0x800 + HANDLE_EXCEPTION + + /* D-TLB miss */ + .org 0x900 + HANDLE_EXCEPTION + + /* I-TLB miss */ + .org 0xa00 + HANDLE_EXCEPTION + + /* range */ + .org 0xb00 + HANDLE_EXCEPTION + + /* system call */ + .org 0xc00 + HANDLE_EXCEPTION + + /* floating point */ + .org 0xd00 + HANDLE_EXCEPTION + + /* trap */ + .org 0xe00 + HANDLE_EXCEPTION + + /* reserved */ + .org 0xf00 + HANDLE_EXCEPTION + + .org 0x1000 +_crt0: + /* Setup stack and global pointer */ + l.movhi r1, hi(_fstack) + l.ori r1, r1, lo(_fstack) + + /* Clear BSS */ + l.movhi r21, hi(_fbss) + l.ori r21, r21, lo(_fbss) + l.movhi r3, hi(_ebss) + l.ori r3, r3, lo(_ebss) +.clearBSS: + l.sfeq r21, r3 + l.bf .callMain + l.nop + l.sw 0(r21), r0 + l.addi r21, r21, 4 + l.j .clearBSS + l.nop + +.callMain: + l.j main + l.nop + +_exception_handler: + l.sw 0x00(r1), r2 + l.sw 0x04(r1), r3 + l.sw 0x08(r1), r4 + l.sw 0x0c(r1), r5 + l.sw 0x10(r1), r6 + l.sw 0x14(r1), r7 + l.sw 0x18(r1), r8 + l.sw 0x20(r1), r10 + l.sw 0x24(r1), r11 + l.sw 0x28(r1), r12 + l.sw 0x2c(r1), r13 + l.sw 0x30(r1), r14 + l.sw 0x34(r1), r15 + l.sw 0x38(r1), r16 + l.sw 0x3c(r1), r17 + l.sw 0x40(r1), r18 + l.sw 0x44(r1), r19 + l.sw 0x48(r1), r20 + l.sw 0x4c(r1), r21 + l.sw 0x50(r1), r22 + l.sw 0x54(r1), r23 + l.sw 0x58(r1), r24 + l.sw 0x5c(r1), r25 + l.sw 0x60(r1), r26 + l.sw 0x64(r1), r27 + l.sw 0x68(r1), r28 + l.sw 0x6c(r1), r29 + l.sw 0x70(r1), r30 + l.sw 0x74(r1), r31 + + /* Save return address */ + l.or r14, r0, r9 + /* Calculate exception vector from handler address */ + l.andi r3, r9, 0xf00 + l.srli r3, r3, 8 + /* Pass saved register state */ + l.or r4, r0, r1 + /* Extract exception PC */ + l.mfspr r5, r0, SPR_EPCR_BASE + /* Extract exception effective address */ + l.mfspr r6, r0, SPR_EEAR_BASE + /* Extract exception SR */ + l.mfspr r7, r0, SPR_ESR_BASE + /* Call exception handler with the link address as argument */ + l.jal exception + l.nop + + /* Load return address */ + l.or r9, r0, r14 + /* Restore state */ + l.lwz r2, 0x00(r1) + l.lwz r3, 0x04(r1) + l.lwz r4, 0x08(r1) + l.lwz r5, 0x0c(r1) + l.lwz r6, 0x10(r1) + l.lwz r7, 0x14(r1) + l.lwz r8, 0x18(r1) + l.lwz r10, 0x20(r1) + l.lwz r11, 0x24(r1) + l.lwz r12, 0x28(r1) + l.lwz r13, 0x2c(r1) + l.lwz r14, 0x30(r1) + l.lwz r15, 0x34(r1) + l.lwz r16, 0x38(r1) + l.lwz r17, 0x3c(r1) + l.lwz r18, 0x40(r1) + l.lwz r19, 0x44(r1) + l.lwz r20, 0x48(r1) + l.lwz r21, 0x4c(r1) + l.lwz r22, 0x50(r1) + l.lwz r23, 0x54(r1) + l.lwz r24, 0x58(r1) + l.lwz r25, 0x5c(r1) + l.lwz r26, 0x60(r1) + l.lwz r27, 0x64(r1) + l.lwz r28, 0x68(r1) + l.lwz r29, 0x6c(r1) + l.lwz r30, 0x70(r1) + l.lwz r31, 0x74(r1) + l.jr r9 + l.nop + +.global _cache_init +_cache_init: + /* + This function is to be used ONLY during reset, before main() is called. + TODO: Perhaps break into individual enable instruction/data cache + sections functions, and provide disable functions, also, all + callable from C + */ + + /* Instruction cache enable */ + /* Check if IC present and skip enabling otherwise */ +#if 1 +.L6: + l.mfspr r3,r0,SPR_UPR + l.andi r7,r3,SPR_UPR_ICP + l.sfeq r7,r0 + l.bf .L8 + l.nop + + /* Disable IC */ + l.mfspr r6,r0,SPR_SR + l.addi r5,r0,-1 + l.xori r5,r5,SPR_SR_ICE + l.and r5,r6,r5 + l.mtspr r0,r5,SPR_SR + + /* Establish cache block size + If BS=0, 16; + If BS=1, 32; + r14 contain block size + */ + l.mfspr r3,r0,SPR_ICCFGR + l.andi r7,r3,SPR_ICCFGR_CBS + l.srli r8,r7,7 + l.ori r4,r0,16 + l.sll r14,r4,r8 + + /* Establish number of cache sets + r10 contains number of cache sets + r8 contains log(# of cache sets) + */ + l.andi r7,r3,SPR_ICCFGR_NCS + l.srli r8,r7,3 + l.ori r4,r0,1 + l.sll r10,r4,r8 + + /* Invalidate IC */ + l.addi r6,r0,0 + l.sll r5,r14,r8 + +.L7: l.mtspr r0,r6,SPR_ICBIR + l.sfne r6,r5 + l.bf .L7 + l.add r6,r6,r14 + + /* Enable IC */ + l.mfspr r6,r0,SPR_SR + l.ori r6,r6,SPR_SR_ICE + l.mtspr r0,r6,SPR_SR + l.nop + l.nop + l.nop + l.nop + l.nop + l.nop + l.nop + l.nop + /* Data cache enable */ + /* Check if DC present and skip enabling otherwise */ +#endif +.L8: +#if 1 + l.mfspr r3,r0,SPR_UPR + l.andi r7,r3,SPR_UPR_DCP + l.sfeq r7,r0 + l.bf .L10 + l.nop + /* Disable DC */ + l.mfspr r6,r0,SPR_SR + l.addi r5,r0,-1 + l.xori r5,r5,SPR_SR_DCE + l.and r5,r6,r5 + l.mtspr r0,r5,SPR_SR + /* Establish cache block size + If BS=0, 16; + If BS=1, 32; + r14 contain block size + */ + l.mfspr r3,r0,SPR_DCCFGR + l.andi r7,r3,SPR_DCCFGR_CBS + l.srli r8,r7,7 + l.ori r4,r0,16 + l.sll r14,r4,r8 + /* Establish number of cache sets + r10 contains number of cache sets + r8 contains log(# of cache sets) + */ + l.andi r7,r3,SPR_DCCFGR_NCS + l.srli r8,r7,3 + l.ori r4,r0,1 + l.sll r10,r4,r8 + /* Invalidate DC */ + l.addi r6,r0,0 + l.sll r5,r14,r8 + +.L9: + l.mtspr r0,r6,SPR_DCBIR + l.sfne r6,r5 + l.bf .L9 + l.add r6,r6,r14 + /* Enable DC */ + l.mfspr r6,r0,SPR_SR + l.ori r6,r6,SPR_SR_DCE + l.mtspr r0,r6,SPR_SR +#endif +.L10: + /* Return */ + l.jr r9 + l.nop diff --git a/artiq/firmware/runtime/Makefile b/artiq/firmware/runtime/Makefile index 8e33691d2..a98ccc312 100644 --- a/artiq/firmware/runtime/Makefile +++ b/artiq/firmware/runtime/Makefile @@ -5,7 +5,7 @@ CFLAGS += \ -I$(LIBUNWIND_DIRECTORY) \ -I$(LIBUNWIND_DIRECTORY)/../unwinder/include -LDFLAGS += -L../libbase \ +LDFLAGS += \ -L../libunwind RUSTFLAGS += -Cpanic=abort diff --git a/artiq/firmware/runtime/lib.rs b/artiq/firmware/runtime/lib.rs index 2723ebb9c..049d8c12a 100644 --- a/artiq/firmware/runtime/lib.rs +++ b/artiq/firmware/runtime/lib.rs @@ -223,7 +223,7 @@ pub extern fn main() -> i32 { } #[no_mangle] -pub extern fn exception_handler(vect: u32, _regs: *const u32, pc: u32, ea: u32) { +pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) { panic!("exception {:?} at PC 0x{:x}, EA 0x{:x}", vect, pc, ea) } diff --git a/artiq/firmware/runtime/runtime.ld b/artiq/firmware/runtime/runtime.ld index 1d21c61fb..67841f91e 100644 --- a/artiq/firmware/runtime/runtime.ld +++ b/artiq/firmware/runtime/runtime.ld @@ -1,8 +1,6 @@ INCLUDE generated/output_format.ld -STARTUP(crt0-or1k.o) -ENTRY(_start) - INCLUDE generated/regions.ld +ENTRY(_reset_handler) /* Assume ORIGIN(main_ram) = 0x40000000. Unfortunately, * ld does not allow this expression here. @@ -13,11 +11,14 @@ MEMORY { SECTIONS { + .vectors : + { + *(.vectors) + } > runtime + .text : { - _ftext = .; - *(.text .stub .text.* .gnu.linkonce.t.*) - _etext = .; + *(.text .text.*) } > runtime .eh_frame : @@ -49,41 +50,23 @@ SECTIONS .rodata : { - . = ALIGN(4); - _frodata = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - *(.rodata1) - _erodata = .; + *(.rodata .rodata.*) } > runtime .data : { - . = ALIGN(4); - _fdata = .; - *(.data .data.* .gnu.linkonce.d.*) - *(.data1) - *(.sdata .sdata.* .gnu.linkonce.s.*) - _edata = .; + *(.data .data.*) } > runtime - .bss : + .bss ALIGN(4) : { - . = ALIGN(4); _fbss = .; - *(.dynsbss) - *(.sbss .sbss.* .gnu.linkonce.sb.*) - *(.scommon) - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); + *(.bss .bss.*) _ebss = .; } > runtime - .stack : + .stack ALIGN(0x1000) : { - . = ALIGN(0x1000); - _estack = .; . += 0x4000; _fstack = . - 4; } > runtime