From 48a2bb10d5248b4aaec43be5b2aba4eeb57a5472 Mon Sep 17 00:00:00 2001 From: whitequark Date: Tue, 17 Nov 2015 05:22:20 +0300 Subject: [PATCH] transforms.interleaver: add boilerplate. --- artiq/compiler/module.py | 2 ++ artiq/compiler/transforms/__init__.py | 1 + artiq/compiler/transforms/interleaver.py | 22 ++++++++++++++++++++++ 3 files changed, 25 insertions(+) create mode 100644 artiq/compiler/transforms/interleaver.py diff --git a/artiq/compiler/module.py b/artiq/compiler/module.py index 0e607fa4d..03ddaae91 100644 --- a/artiq/compiler/module.py +++ b/artiq/compiler/module.py @@ -58,6 +58,7 @@ class Module: dead_code_eliminator = transforms.DeadCodeEliminator(engine=self.engine) local_access_validator = validators.LocalAccessValidator(engine=self.engine) devirtualization = analyses.Devirtualization() + interleaver = transforms.Interleaver(engine=self.engine) self.name = src.name self.globals = src.globals @@ -71,6 +72,7 @@ class Module: artiq_ir_generator.annotate_calls(devirtualization) dead_code_eliminator.process(self.artiq_ir) local_access_validator.process(self.artiq_ir) + interleaver.process(self.artiq_ir) def build_llvm_ir(self, target): """Compile the module to LLVM IR for the specified target.""" diff --git a/artiq/compiler/transforms/__init__.py b/artiq/compiler/transforms/__init__.py index 39831fea3..665fd3ea1 100644 --- a/artiq/compiler/transforms/__init__.py +++ b/artiq/compiler/transforms/__init__.py @@ -5,3 +5,4 @@ from .iodelay_estimator import IODelayEstimator from .artiq_ir_generator import ARTIQIRGenerator from .dead_code_eliminator import DeadCodeEliminator from .llvm_ir_generator import LLVMIRGenerator +from .interleaver import Interleaver diff --git a/artiq/compiler/transforms/interleaver.py b/artiq/compiler/transforms/interleaver.py new file mode 100644 index 000000000..256c5508d --- /dev/null +++ b/artiq/compiler/transforms/interleaver.py @@ -0,0 +1,22 @@ +""" +:class:`Interleaver` reorders requests to the RTIO core so that +the timestamp would always monotonically nondecrease. +""" + +from .. import ir +from ..analyses import domination + +class Interleaver: + def __init__(self, engine): + self.engine = engine + + def process(self, functions): + for func in functions: + self.process_function(func) + + def process_function(self, func): + domtree = domination.PostDominatorTree(func) + print(func) + for block in func.basic_blocks: + idom = domtree.immediate_dominator(block) + print(block.name, "->", idom.name if idom else "")