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sayma_amc: pass RTIO clock frequency to SiPhaser

This commit is contained in:
Sebastien Bourdeauducq 2019-01-28 09:49:03 +08:00
parent 3b6f47886e
commit 443d6d8688
1 changed files with 2 additions and 1 deletions
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3
artiq/gateware/targets/sayma_amc.py
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@ -561,7 +561,8 @@ class Satellite(BaseSoC, RTMCommon):
self.config["RTIO_FREQUENCY"] = str(rtio_clk_freq/1e6) self.config["RTIO_FREQUENCY"] = str(rtio_clk_freq/1e6)
self.submodules.siphaser = SiPhaser7Series( self.submodules.siphaser = SiPhaser7Series(
si5324_clkin=platform.request("si5324_clkin"), si5324_clkin=platform.request("si5324_clkin"),
rx_synchronizer=self.rx_synchronizer) rx_synchronizer=self.rx_synchronizer,
rtio_clk_freq=rtio_clk_freq)
platform.add_platform_command("set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {mmcm_ps}]", platform.add_platform_command("set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {mmcm_ps}]",
mmcm_ps=self.siphaser.mmcm_ps_output) mmcm_ps=self.siphaser.mmcm_ps_output)
platform.add_false_path_constraints( platform.add_false_path_constraints(