mirror of
https://github.com/m-labs/artiq.git
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tester: add urukul sync
Signed-off-by: Robert Jördens <rj@quartiq.de>
This commit is contained in:
parent
60d3bc63a7
commit
4269d5ad5c
@ -57,36 +57,42 @@ device_db.update(
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"class": "SPIMaster",
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"arguments": {"channel": 8}
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},
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ttl_urukul0_io_update={
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ttl_urukul0_sync={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 9}
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"class": "TTLClockGen",
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"arguments": {"channel": 9, "acc_width": 4}
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},
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ttl_urukul0_sw0={
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ttl_urukul0_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 10}
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},
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ttl_urukul0_sw1={
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ttl_urukul0_sw0={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 11}
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},
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ttl_urukul0_sw2={
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ttl_urukul0_sw1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 12}
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},
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ttl_urukul0_sw3={
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ttl_urukul0_sw2={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 13}
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},
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ttl_urukul0_sw3={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 14}
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},
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urukul0_cpld={
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"type": "local",
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"module": "artiq.coredevice.urukul",
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@ -94,6 +100,7 @@ device_db.update(
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"arguments": {
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"spi_device": "spi_urukul0",
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"io_update_device": "ttl_urukul0_io_update",
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"sync_device": "ttl_urukul0_sync",
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"refclk": 125e6,
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"clk_sel": 0
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}
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@ -119,19 +126,19 @@ device_db["spi_sampler0_adc"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 14}
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"arguments": {"channel": 15}
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}
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device_db["spi_sampler0_pgia"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 15}
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"arguments": {"channel": 16}
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}
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device_db["spi_sampler0_cnv"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 16},
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"arguments": {"channel": 17},
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}
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device_db["sampler0"] = {
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"type": "local",
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@ -150,19 +157,19 @@ device_db["spi_zotino0"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 17}
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"arguments": {"channel": 18}
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}
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device_db["ttl_zotino0_ldac"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 18}
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"arguments": {"channel": 19}
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}
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device_db["ttl_zotino0_clr"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 19}
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"arguments": {"channel": 20}
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}
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device_db["zotino0"] = {
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"type": "local",
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@ -181,7 +188,7 @@ device_db["grabber0"] = {
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"type": "local",
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"module": "artiq.coredevice.grabber",
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"class": "Grabber",
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"arguments": {"channel_base": 20}
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"arguments": {"channel_base": 21}
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}
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@ -191,13 +198,19 @@ device_db.update(
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 22}
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"arguments": {"channel": 23}
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},
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ttl_urukul1_sync={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {"channel": 24, "acc_width": 4}
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},
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ttl_urukul1_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 23}
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"arguments": {"channel": 25}
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},
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urukul1_cpld={
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"type": "local",
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@ -206,6 +219,7 @@ device_db.update(
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"arguments": {
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"spi_device": "spi_urukul1",
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"io_update_device": "ttl_urukul1_io_update",
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"sync_device": "ttl_urukul1_sync",
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"refclk": 100e6,
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"clk_sel": 1
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}
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@ -231,7 +245,7 @@ for i in range(8):
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 24 + i},
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"arguments": {"channel": 26 + i},
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}
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@ -241,7 +255,7 @@ for i in range(8):
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 32 + i},
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"arguments": {"channel": 34 + i},
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}
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@ -250,19 +264,19 @@ device_db["spi_sampler1_adc"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 40}
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"arguments": {"channel": 42}
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}
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device_db["spi_sampler1_pgia"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 41}
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"arguments": {"channel": 43}
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}
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device_db["spi_sampler1_cnv"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 42},
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"arguments": {"channel": 44},
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}
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device_db["sampler1"] = {
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"type": "local",
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@ -281,19 +295,19 @@ device_db["spi_zotino1"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 43}
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"arguments": {"channel": 45}
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}
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device_db["ttl_zotino1_ldac"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 44}
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"arguments": {"channel": 46}
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}
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device_db["ttl_zotino1_clr"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 45}
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"arguments": {"channel": 47}
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}
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device_db["zotino1"] = {
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"type": "local",
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@ -312,13 +326,13 @@ device_db.update(
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 46}
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"arguments": {"channel": 48}
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},
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led1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 47}
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"arguments": {"channel": 49}
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},
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)
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@ -648,11 +648,13 @@ class Tester(_StandaloneBase):
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self.grabber_csr_group = []
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eem.DIO.add_std(self, 5,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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eem.Sampler.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 4, ttl_serdes_7series.Output_8X)
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eem.Grabber.add_std(self, 6)
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eem.Urukul.add_std(self, 7, None, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 7, None, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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eem.DIO.add_std(self, 8,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 9,
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