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Undo hex formatting
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@ -32,12 +32,12 @@ _AD9910_REG_IO_UPDATE = 0x04
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_AD9910_REG_FTW = 0x07
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_AD9910_REG_POW = 0x08
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_AD9910_REG_ASF = 0x09
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_AD9910_REG_SYNC = 0x0A
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_AD9910_REG_RAMP_LIMIT = 0x0B
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_AD9910_REG_RAMP_STEP = 0x0C
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_AD9910_REG_RAMP_RATE = 0x0D
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_AD9910_REG_PROFILE0 = 0x0E
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_AD9910_REG_PROFILE1 = 0x0F
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_AD9910_REG_SYNC = 0x0a
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_AD9910_REG_RAMP_LIMIT = 0x0b
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_AD9910_REG_RAMP_STEP = 0x0c
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_AD9910_REG_RAMP_RATE = 0x0d
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_AD9910_REG_PROFILE0 = 0x0e
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_AD9910_REG_PROFILE1 = 0x0f
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_AD9910_REG_PROFILE2 = 0x10
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_AD9910_REG_PROFILE3 = 0x11
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_AD9910_REG_PROFILE4 = 0x12
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@ -90,10 +90,10 @@ class SyncDataEeprom:
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word = self.eeprom_device.read_i32(self.eeprom_offset) >> 16
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sync_delay_seed = word >> 8
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if sync_delay_seed >= 0:
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io_update_delay = word & 0xFF
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io_update_delay = word & 0xff
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else:
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io_update_delay = 0
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if io_update_delay == 0xFF: # unprogrammed EEPROM
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if io_update_delay == 0xff: # unprogrammed EEPROM
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io_update_delay = 0
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# With Numpy, type(int32(-1) >> 1) == int64
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self.sync_delay_seed = int32(sync_delay_seed)
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@ -238,7 +238,7 @@ class AD9910:
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"""
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self.bus.set_config_mu(urukul.SPI_CONFIG | spi.SPI_END, 24,
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urukul.SPIT_DDS_WR, self.chip_select)
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self.bus.write((addr << 24) | ((data & 0xFFFF) << 8))
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self.bus.write((addr << 24) | ((data & 0xffff) << 8))
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@kernel
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def write32(self, addr: TInt32, data: TInt32):
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@ -485,7 +485,7 @@ class AD9910:
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if not blind:
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# Use the AUX DAC setting to identify and confirm presence
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aux_dac = self.read32(_AD9910_REG_AUX_DAC)
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if aux_dac & 0xFF != 0x7F:
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if aux_dac & 0xff != 0x7f:
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raise ValueError("Urukul AD9910 AUX_DAC mismatch")
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delay(50 * us) # slack
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# Configure PLL settings and bring up PLL
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@ -529,7 +529,7 @@ class AD9910:
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self.cpld.io_update.pulse(1 * us)
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@kernel
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def set_mu(self, ftw: TInt32 = 0, pow_: TInt32 = 0, asf: TInt32 = 0x3FFF,
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def set_mu(self, ftw: TInt32 = 0, pow_: TInt32 = 0, asf: TInt32 = 0x3fff,
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phase_mode: TInt32 = _PHASE_MODE_DEFAULT,
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ref_time_mu: TInt64 = int64(-1),
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profile: TInt32 = DEFAULT_PROFILE,
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@ -584,7 +584,7 @@ class AD9910:
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pow_ += dt * ftw * self.sysclk_per_mu >> 16
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if ram_destination == -1:
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self.write64(_AD9910_REG_PROFILE0 + profile,
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(asf << 16) | (pow_ & 0xFFFF), ftw)
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(asf << 16) | (pow_ & 0xffff), ftw)
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else:
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if not ram_destination == RAM_DEST_FTW:
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self.set_ftw(ftw)
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@ -617,8 +617,8 @@ class AD9910:
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data = int64(self.read64(_AD9910_REG_PROFILE0 + profile))
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# Extract and return fields
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ftw = int32(data)
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pow_ = int32((data >> 32) & 0xFFFF)
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asf = int32((data >> 48) & 0x3FFF)
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pow_ = int32((data >> 32) & 0xffff)
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asf = int32((data >> 48) & 0x3fff)
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return ftw, pow_, asf
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@kernel
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@ -720,7 +720,7 @@ class AD9910:
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def turns_to_pow(self, turns: TFloat) -> TInt32:
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"""Return the 16-bit phase offset word corresponding to the given phase
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in turns."""
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return int32(round(turns * 0x10000)) & int32(0xFFFF)
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return int32(round(turns * 0x10000)) & int32(0xffff)
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@portable(flags={"fast-math"})
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def pow_to_turns(self, pow_: TInt32) -> TFloat:
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@ -732,8 +732,8 @@ class AD9910:
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def amplitude_to_asf(self, amplitude: TFloat) -> TInt32:
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"""Return 14-bit amplitude scale factor corresponding to given
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fractional amplitude."""
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code = int32(round(amplitude * 0x3FFF))
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if code < 0 or code > 0x3FFF:
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code = int32(round(amplitude * 0x3fff))
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if code < 0 or code > 0x3fff:
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raise ValueError("Invalid AD9910 fractional amplitude!")
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return code
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@ -741,7 +741,7 @@ class AD9910:
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def asf_to_amplitude(self, asf: TInt32) -> TFloat:
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"""Return amplitude as a fraction of full scale corresponding to given
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amplitude scale factor."""
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return asf / float(0x3FFF)
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return asf / float(0x3fff)
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@portable(flags={"fast-math"})
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def frequency_to_ram(self, frequency: TList(TFloat), ram: TList(TInt32)):
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