mirror of https://github.com/m-labs/artiq.git
experiment: simplify definition of kernel_attr
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@ -11,8 +11,8 @@ class DDS:
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self._previous_frequency = 0*MHz
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kernel_attr_ro = {"reg_channel", "rtio_channel", "latency", "phase_mode"}
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kernel_attr = {"_previous_frequency"}
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kernel_attr_ro = "reg_channel rtio_channel latency phase_mode"
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kernel_attr = "_previous_frequency"
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@kernel
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def pulse(self, frequency, duration):
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@ -5,9 +5,7 @@ class Experiment:
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parameters = ""
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def __init__(self, *args, **kwargs):
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channels = self.channels.split()
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parameters = self.parameters.split()
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argnames = channels + parameters
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argnames = self.channels.split() + self.parameters.split()
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undef_args = list(argnames)
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if len(argnames) < len(args):
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@ -23,7 +21,7 @@ class Experiment:
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raise TypeError("__init__() missing {} argument(s): ".format(len(undef_args),
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", ".join(["'"+s+"'" for s in undef_args])))
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self.kernel_attr_ro = set(parameters)
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self.kernel_attr_ro = self.parameters
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def kernel(arg):
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if isinstance(arg, str):
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