mirror of https://github.com/m-labs/artiq.git
manual: minor cleanup
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@ -14,7 +14,7 @@ The conda package contains pre-built binaries that you can directly flash to you
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.. warning::
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.. warning::
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Conda packages are supported for Linux (64-bit) and Windows (32- and 64-bit).
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Conda packages are supported for Linux (64-bit) and Windows (32- and 64-bit).
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Users of other operating systems (32-bit Linux, BSD, OSX ...) should and can :ref:`install from source <install-from-sources>`.
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Users of other operating systems (32-bit Linux, BSD, OSX ...) should and can :ref:`install from source <install-from-source>`.
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Installing Anaconda or Miniconda
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Installing Anaconda or Miniconda
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@ -1,15 +1,14 @@
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.. _install-from-sources:
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.. _install-from-source:
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Installing ARTIQ from source
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Installing ARTIQ from sources
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============================
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=============================
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.. note::
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.. note::
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This method is only recommended for developers and advanced users. An easier way to install ARTIQ is via the Anaconda packages (see :ref:`Installing ARTIQ <install-from-conda>`).
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This method is only recommended for developers and advanced users. An easier way to install ARTIQ is via the Anaconda packages (see :ref:`Installing ARTIQ <install-from-conda>`).
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Preparing the build environment for the core device
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Preparing the build environment for the core device
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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---------------------------------------------------
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These steps are required to generate code that can run on the core
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These steps are required to generate code that can run on the core
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device. They are necessary both for building the MiSoC BIOS
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device. They are necessary both for building the MiSoC BIOS
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@ -59,7 +58,7 @@ and the ARTIQ kernels.
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Compilation of LLVM can take more than 30 min on some machines.
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Compilation of LLVM can take more than 30 min on some machines.
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Preparing the core device FPGA board
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Preparing the core device FPGA board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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------------------------------------
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These steps are required to generate gateware bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
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These steps are required to generate gateware bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
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@ -164,7 +163,7 @@ to the serial device (``sudo adduser $USER dialout`` assuming standard setup).
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.. _installing-the-host-side-software:
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.. _installing-the-host-side-software:
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Installing the host-side software
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Installing the host-side software
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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---------------------------------
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* Install the llvmlite Python bindings: ::
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* Install the llvmlite Python bindings: ::
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