From 3a79ef740b7af332df289bc17d23f4ec7c783f38 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Mon, 14 Sep 2020 08:31:54 +0000 Subject: [PATCH] phaser: work around integer size --- artiq/coredevice/phaser.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/artiq/coredevice/phaser.py b/artiq/coredevice/phaser.py index 7449ab19b..ad7f6b028 100644 --- a/artiq/coredevice/phaser.py +++ b/artiq/coredevice/phaser.py @@ -415,7 +415,7 @@ class PhaserChannel: :param frequency: DUC frequency in Hz (passband from -200 MHz to 200 MHz, wrapping around at +- 250 MHz) """ - ftw = int32(round(frequency*((1 << 32)/(500*MHz)))) + ftw = int32(round(frequency*((1 << 31)/(250*MHz)))) self.set_duc_frequency_mu(ftw) @kernel @@ -559,7 +559,7 @@ class PhaserOscillator: :param frequency: Frequency in Hz (passband from -10 MHz to 10 MHz, wrapping around at +- 12.5 MHz) """ - ftw = int32(round(frequency*((1 << 32)/(25*MHz)))) + ftw = int32(round(frequency*((1 << 31)/(12.5*MHz)))) self.set_frequency_mu(ftw) @kernel